Principal, IO Design Engineering

1000 Micron Technology, Inc.; Boise (ID); On-site; USD 120,000 - 160,000; Full time

Benefits offered by this job

Medical, dental, and vision plans

Paid family leave

Robust paid time-off program

Job summary

1000 Micron Technology, Inc. in Boise, Idaho is seeking a Principal IO/Clocking Design Engineer. In this role, you will innovate and verify high-speed IO and clocking circuits used in new DRAM products, ensuring optimal performance.

The ideal candidate will have a strong background in analog and mixed-signal circuit design with at least a Master’s degree plus 10 years of experience, proficiency in CADENCE, and excellent communication skills.

Micron offers competitive benefits suited to your family healthcare needs and a robust paid time-off program.

Qualifications

• Minimum MSEE + 10 years or BSEE + 12 years of industry experience in analog and mixed-signal circuit design.
• Proficiency with UNIX and CADENCE design environment (simulation, schematic entry, SPF extraction).
• Understanding of device physics and basic CMOS processing techniques.
• Ability to supervise layout work and understand good layout practices for high-speed circuits.

Responsibilities

• Innovate and verify high-speed IO and clocking circuits used in new DRAM products.
• Develop accurate modeling and analysis methodology.
• Work with Product Engineering and SI team on silicon performance correlation.
• Collaborate with process integration teams on new process nodes.

Skills

Analog and mixed-signal circuit design

UNIX and CADENCE design environment

Device physics understanding

High-speed circuit layout practices

Strong communication skills

Channel modeling and transceiver noise

Education

MSEE + 10 years or BSEE + 12 years experience

Tools

CADENCE

PERL

Python

Job description

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking a Principal IO/Clocking Design Engineer to be a part of our design team working on critical high-speed circuits common to all DRAM related memory products! In this position, you will be responsible for the development, design, optimization, verification, and fan out of these high-speed circuits to all DRAM related projects at Micron. You will work on equalization and bandwidth extension to push the speed limits of the circuit and process technology, analyze resulting IO impairments, clock jitter and duty error impact to DRAM system and timing budget, and develop effective engineering solutions.

Responsibilities

• Innovate, design, optimize and verify high-speed IO and clocking circuits used in new DRAM products.
• Apply proven high-speed circuit design techniques and enhance critical performance evaluation of the IO data path and clocking path at circuit level.
• Develop accurate modeling, analysis and simulation methodology to capture key circuit performance metrics and their impact to product specifications at full-chip and system level.
• Work with Product Engineering and SI team to compare silicon performance with simulation results and support correlation activities.
• Collaborate with process integration and transistor modeling teams on Micron's next groundbreaking process node.

Minimum Qualifications

• Minimum MSEE + 10 years or BSEE + 12 years of industry experience in analog and mixed‑signal circuit design.
• Proficiency with UNIX and CADENCE design environment (simulation, schematic entry, SPF extraction).
• Understanding of device physics and basic CMOS processing techniques.
• Ability to supervise layout work and understand good layout practices for high-speed circuits to minimize parasitic impacts.
• Strong communication skills with the ability to convey sophisticated technical concepts to other design peers both verbally and written.
• Mental agility is a must for this position as we work with all product types (commodity, mobile, graphics) and product teams in parallel with silicon validation efforts.

Preferred Qualifications

• 7+ years of experience in high-speed transmitter, receiver and clocking circuit design and optimization with proven silicon successes.
• Prior experience in channel modeling and characterization, transceiver noise and timing budget analysis, equalization techniques, SI knowledge, etc.
• Demonstrated ability in mentoring and coaching engineers early in their careers.
• Demonstrated ability with AI/ML usage and fluency in scripting languages such as PERL/Python.

Benefits

Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time‑off program and paid holidays. For additional information regarding the Benefit programs available, please see the Benefits Guide posted on micron.com/careers/benefits.

Equal Opportunity Employment

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.