Signal Integrity Architect: CXL & High-Perf Server SI

Qualcomm; Santa Clara (CA); On-site; USD 220,200 - 330,400; Full time

Job summary

Qualcomm Technologies, Inc. is seeking a Signal Integrity Architect in Santa Clara to lead high-speed SI solutions for server platforms.

You will analyze, simulate, and validate CXL 2.0/3.0 and GPIO/LSIO interfaces across PCB and system levels, collaborating with cross-functional teams to meet stringent performance and reliability targets. Growth opportunities include contributing to design guidelines, automation, and customer-facing SI collateral while advancing packaging and interconnect

Qualifications

• Bachelor's degree or higher in Engineering or related field.
• 8+ years in SI analysis, simulation, and measurement of high-speed digital systems.
• Strong knowledge of PDN, EMIR, transmission line theory, and S-parameters.

Responsibilities

• Own SI analysis, simulation, and design closure for CXL 2.0/3.0 interfaces.
• Collaborate with SoC, packaging, and system design teams to define interconnects.
• Develop SI guidelines for PCB stack-ups, routing constraints, and material selection.

Skills

SI analysis

CXL 2.0/3.0

PCB/Packaging knowledge

2D/2.5D/3D EM simulation

Unix/Linux scripting

Education

Bachelor's degree in Engineering

Master's degree in Engineering

PhD in Electrical/Computer Engineering

Tools

HFSS/HFSS3D

Cadence Sigrity

CST

Keysight ADS

Synopsys HSPICE

MATLAB/Python/Perl

Job description

Qualcomm Technologies, Inc. is seeking a Signal Integrity Architect in Santa Clara to lead high-speed SI solutions for server platforms.

You will analyze, simulate, and validate CXL 2.0/3.0 and GPIO/LSIO interfaces across PCB and system levels, collaborating with cross-functional teams to meet stringent performance and reliability targets. Growth opportunities include contributing to design guidelines, automation, and customer-facing SI collateral while advancing packaging and interconnect