SerDes Silicon Architect: High-Speed Transceivers

AMD; San Jose (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

AMD Serdes Technology Group seeks an expert in analog/mixed-signal transceiver design and architecture to advance high-speed PHY projects in San Jose, CA. You will define micro-architecture, model, simulate, implement and verify Tx/Rx front-end blocks, clocking circuits, DSPs and CDR, working with multidisciplinary teams to deliver next-gen devices.

The role requires strong communication and documentation skills, collaboration on pre-tapeout verification, and post-silicon validation, with a

Qualifications

• Ph.D in electrical engineering or related field with industrial experience, or MS with relevant experience in optical/electrical transceiver design.
• Excellent communication and documentation skills.
• Self-starter who collaborates with cross-functional teams.

Responsibilities

• Lead transceiver micro-architecture definition, modeling, simulation, implementation and verification of analog front-end blocks, clocking circuits, DSPs, CDR, adaptation and calibration loops, firmware loops, system level interface.
• Collaborate with pre-tapeout verification and post-silicon teams to bring up silicon and analyze volume data.

Education

Ph.D in electrical engineering or related field

MS in electrical engineering

Job description

AMD Serdes Technology Group seeks an expert in analog/mixed-signal transceiver design and architecture to advance high-speed PHY projects in San Jose, CA. You will define micro-architecture, model, simulate, implement and verify Tx/Rx front-end blocks, clocking circuits, DSPs and CDR, working with multidisciplinary teams to deliver next-gen devices.

The role requires strong communication and documentation skills, collaboration on pre-tapeout verification, and post-silicon validation, with a