SerDes Optical Transceiver Silicon Design Intern/Co-op

AMD; Santa Clara (CA); Hybrid; USD 24,000 - 36,000; Full time

Job summary

AMD is seeking a SerDes Silicon Design and Architecture Modeling Engineer Intern/Co-Op in the San Jose/Santa Clara area. You will work on cutting-edge optical transceivers and SerDes technology, collaborating with experienced engineers on impactful projects.

The role targets PhD candidates in ECE or related fields, with strong design and modeling skills, and a passion for high‑speed interconnects. This full‑time internship offers hands-on mentorship, practical tooling experience, and a path to

Qualifications

• PhD student in Electrical Engineering or related field with at least two years of PhD coursework.
• Strong coursework in device physics, circuit/RTL design, DSP, SerDes, or related areas.
• Experience with simulation or modeling tools; ability to conduct technical research.

Responsibilities

• Engage in SerDes optical transceiver silicon design and modeling projects.
• Collaborate with mentors to define objectives and evaluate solutions.
• Document technical findings and present results to the team at term end.
• Gain experience across CAD, modeling environments, and related tooling.

Skills

SerDes design

Optical transceivers

Circuit design

RTL/logic design

Design automation

Modeling

Education

PhD in Electrical Engineering

Tools

CAD tools

Simulation software

Job description

AMD is seeking a SerDes Silicon Design and Architecture Modeling Engineer Intern/Co-Op in the San Jose/Santa Clara area. You will work on cutting-edge optical transceivers and SerDes technology, collaborating with experienced engineers on impactful projects.

The role targets PhD candidates in ECE or related fields, with strong design and modeling skills, and a passion for high‑speed interconnects. This full‑time internship offers hands-on mentorship, practical tooling experience, and a path to