SerDes Design Intern (Analog/Mixed-Signal)

AMD

Santa Clara (CA)

Hybrid

USD 34,000 - 55,000

Full time

9 days ago
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Job summary

AMD is seeking an electrical engineering PhD student for a full-time co-op/internship in the San Jose/Santa Clara area. You will work on high-speed analog/mixed-signal IC design, simulating and modeling on-die RF components and optical structures, and contributing to DAC/ADC and clocking blocks in advanced FinFET processes.

You will collaborate with experts to tackle challenging SerDes/receiver/transceiver architectures, using MATLAB, SPICE, and CAD tools, with exposure to silicon-photonics.

Qualifications

  • PhD student in Electrical Engineering or closely related field.
  • Experience in analog/mixed-signal design and simulations (ADCs, DACs, CTLEs, PLLs, clocking).
  • Familiar with MATLAB, SPICE, and industry CAD tools for simulation and design.

Responsibilities

  • Define circuit architectures optimized for high-bandwidth links.
  • Perform link-level simulations using MATLAB and SPICE.
  • Contribute to design and modeling of on-die RF components and optical structures.
  • Assist in design/implementation of DACs, SAR-ADCs, sample-and-hold, analog front ends, PLLs, and clock networks in advanced FinFET tech.
  • Gain exposure to high-speed ADC/DAC receivers and silicon-photonics transceivers.

Skills

MATLAB
SPICE
Analog design
Mixed-signal design
SerDes
CMOS design
FinFET tech
PLL design
DAC/ADC
Optical transceivers
Clock distribution

Education

PhD in Electrical Engineering

Tools

CAD tools
SPICE

Job description

AMD is seeking an electrical engineering PhD student for a full-time co-op/internship in the San Jose/Santa Clara area. You will work on high-speed analog/mixed-signal IC design, simulating and modeling on-die RF components and optical structures, and contributing to DAC/ADC and clocking blocks in advanced FinFET processes.

You will collaborate with experts to tackle challenging SerDes/receiver/transceiver architectures, using MATLAB, SPICE, and CAD tools, with exposure to silicon-photonics.

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