PhD SerDes Silicon Design Intern/Co‑op

AMD; San Jose (CA); Hybrid; USD 34,000 - 52,000; Full time

Job summary

AMD invites PhD‑level candidates to join as an Intern/Co‑Op in San Jose, CA, to work on SerDes optical transceivers and silicon design. You will collaborate with senior engineers, learn design automation and modeling tools, and present final results to the team.

This full‑time co‑op/internship offers hands‑on experience in a dynamic AI‑driven environment. Applicants should be pursuing a PhD with relevant coursework in EE/CS/Physics, and have exposure to RTL, DSP, SerDes, and clocking design.

Qualifications

• Currently pursuing a PhD in Electrical Engineering, Computer Science & Engineering, Mathematics, Physics, or related field with at least two years of PhD coursework.
• Coursework or research in device physics, circuit design, RTL/logic design, design automation, RF design, SerDes design, DSP design, PLL/clocking circuits.
• Familiarity with power‑efficient, high‑performace circuit design methodologies.
• Experience using simulation, modeling, or design tools to analyze engineering designs.

Responsibilities

• Work on cutting‑edge silicon design and architecture modeling projects for SerDes optical transceivers.
• Collaborate with mentor engineers to define objectives and evaluate solutions.
• Learn and apply CAD, AI, software development, and modeling environments for project work.
• Research and propose innovative approaches to challenging design problems with simulations.
• Document findings and deliver a final presentation to the engineering team.

Skills

RTL/logic design

design automation

software engineering

RF design

SerDes design

DSP design

clocking circuit design

Education

PhD in Electrical Engineering or related field

Tools

CAD

modeling environments

simulation tools

AI tooling

Job description

AMD invites PhD‑level candidates to join as an Intern/Co‑Op in San Jose, CA, to work on SerDes optical transceivers and silicon design. You will collaborate with senior engineers, learn design automation and modeling tools, and present final results to the team.

This full‑time co‑op/internship offers hands‑on experience in a dynamic AI‑driven environment. Applicants should be pursuing a PhD with relevant coursework in EE/CS/Physics, and have exposure to RTL, DSP, SerDes, and clocking design.