Senior Yield & Process Optimization Engineer

1010 Analog Devices Inc.; Camas (WA); On-site; USD 96,000 - 131,000; Full time

Benefits offered by this job

Discretionary bonus

Medical, vision and dental coverage

401k

Paid vacation and holidays

Sick time

Job summary

Analog Devices, Inc. is seeking a Senior Engineer in Process Sustaining Engineering focused on Yield/Integration.

The role supports manufacturing, driving yield improvements, and qualifying new processes and tools to boost efficiency across Bipolar, CMOS, DMOS, RF, and BiCMOS devices. Candidates should have a BS or MS in ChemE, Materials Science, EE, or Physics with 4+ years in semiconductor yield, strong SPC/DOE skills, and the ability to convey findings to cross‑functional teams.

Qualifications

• Bachelors or Masters degree in ChemE, Mat Sci, EE, Physics or related.
• 4+ years in semiconductor yield improvement and integration.
• Advanced SPC and engineering statistics.
• Excellent written, verbal, and presentation skills.
• Ability to train, influence, and motivate coworkers across education levels.
• Drive quality, productivity, and manufacturability within the organization.

Responsibilities

• Yield improvement for Fab Electrical Test and Probe Parametric Test across multiple devices and techs.
• Propose and implement process changes for yield improvement and fab modernization.
• Qualify new products and review process changes and new tool qualifications.
• Analyze Electrical test and Sort Yield data; communicate recommendations to cross-functional teams.
• Prepare, analyze and present key operational metrics to senior management.
• Coordinate with IT, Supply Chain, Process Engineering and site support groups.

Skills

Yield improvement

DOE

SPC

Data analysis

Cross-functional communication

Education

Bachelors or Masters in related field

Tools

HP/Keysight tester

Keithley tester

WAT/ETEST

SQL

C++

Job description

Analog Devices, Inc. is seeking a Senior Engineer in Process Sustaining Engineering focused on Yield/Integration.

The role supports manufacturing, driving yield improvements, and qualifying new processes and tools to boost efficiency across Bipolar, CMOS, DMOS, RF, and BiCMOS devices. Candidates should have a BS or MS in ChemE, Materials Science, EE, or Physics with 4+ years in semiconductor yield, strong SPC/DOE skills, and the ability to convey findings to cross‑functional teams.