Senior Process Integration Engineer & Yield Lead

Tower Semiconductor Ltd.; San Antonio (TX); Presencial; USD 120 000 - 180 000; Tempo integral

Resumo da oferta

Tower Semiconductor is seeking a motivated engineer to develop, improve, and sustain manufacturing process flows across analog IC fabrication. You will drive technology transfers, coordinate cross-functional teams, and escalate issues with customers and internal stakeholders to ensure on-time, high-quality ramp of new processes.

The role emphasizes hands-on analysis of E-test and yield data, writing robust procedures, and leading optimization efforts to reduce scrap and improve device

Qualificações

• Requires advanced degree in a relevant engineering or physical science field.
• Experience with semiconductor manufacturing processes and data analysis is preferred.
• Strong communication and problem-solving skills for cross-functional teams.

Responsabilidades

• Develop, improve, and sustain manufacturing process flows end-to-end.
• Lead and coordinate technology transfers and new process developments for foundry customers.
• Collaborate with Process Engineering, Equipment Engineering, Operations, and R&D teams on multi-department projects.
• Analyze E-test and yield data and provide feedback to engineers to optimize processes.
• Prepare process capability reports and drive containment, root-cause analysis, and corrective actions.

Conhecimentos

Process Integration

Device Physics

Thin Films

Etch

CMP

Photolithography

Diffusion

Implant

E-Test

SPC & DOE

Formação académica

MS or PhD in Electrical or Chemical Engineering, Physics or Materials Science

Descrição da oferta de emprego

Tower Semiconductor is seeking a motivated engineer to develop, improve, and sustain manufacturing process flows across analog IC fabrication. You will drive technology transfers, coordinate cross-functional teams, and escalate issues with customers and internal stakeholders to ensure on-time, high-quality ramp of new processes.

The role emphasizes hands-on analysis of E-test and yield data, writing robust procedures, and leading optimization efforts to reduce scrap and improve device