Senior Yield Analysis Engineer — Semiconductors (On-Site)

Bzpp; United States; On-site; USD 110,000 - 145,000; Full time

Benefits offered by this job

Medical, dental, and vision insurance

Life insurance & 401(k) matching

Onsite café(s) and workout facilities

Paid maternity and paternity leave

Paid time off and holidays

Wellness incentives

Job summary

Samsung Austin Semiconductor seeks a Yield Analysis Engineer to own high-volume products across tech nodes and collaborate across teams to monitor line health and trace yield deviations to closure.

The role includes yield event closure, customer yield management, daily wafer testing (EDS) map reviews, and in-depth root-cause analyses for bin and zonal shifts. On-site in Austin with competitive benefits and total rewards.

Qualifications

• 7+ years of direct industry experience in yield, device, or process engineering.
• Understanding of semiconductor process, coding, process integration, device physics.

Responsibilities

• Yield event closure and defense line: confirm defense line effectiveness to close events.
• Customer yield management: prepare material sets and align cross-functional messaging.
• Commonality: daily wafer testing and yield summary review; perform root-cause analyses for bin and zonal shifts.
• Change point analyses: perform analysis for spec release for both EDS and FT yield; propose fixes.

Skills

Yield engineering

Device engineering

Process engineering

Coding

Semiconductor process

Device physics

Education

EE/Physics/ChemE degree

Tools

EDS

Job description

Samsung Austin Semiconductor seeks a Yield Analysis Engineer to own high-volume products across tech nodes and collaborate across teams to monitor line health and trace yield deviations to closure.

The role includes yield event closure, customer yield management, daily wafer testing (EDS) map reviews, and in-depth root-cause analyses for bin and zonal shifts. On-site in Austin with competitive benefits and total rewards.