Senior Virtual Protocol Verification Engineer

Cadence Design Systems, Inc.; San Jose (CA); On-site; USD 137,000 - 254,000; Full time

Job summary

Cadence Design Systems, Inc. in San Jose, CA is seeking a Principal Product Engineer to advance our Virtual Protocols and emulation-based verification platforms, partnering with R&D and field teams to ensure customer success.

You will own feature definition, deliver training, and help customers deploy Cadence Palladium and Protium systems, driving shift-left verification and performance, while expanding your software, hardware, and protocol knowledge.

Qualifications

• Experience with PCIe, CXL, Ethernet, USB, AMBA protocols.
• Proficient in verification methodologies and SystemC/Porta ble Stimulus.
• Solid software development skills in C/C++, Linux kernel/driver development.
• Experience in SOC design and verification preferred.
• Hardware emulation experience recommended.
• HDL knowledge in SystemVerilog and VHDL.
• Proficient in scripting languages such as shell, Python, or Perl.
• Familiar with compiler tools like make and gcc/g++.

Responsibilities

• Using OS, kernel, and driver SW expertise to support Cadence VirtualBridge products.
• Helping customers utilize accelerated verification IPs and APIs to shift-left pre-silicon verification.
• Guiding deployment of protocol products and features in PCIe, CXL, Ethernet, USB, AMBA.
• Driving product performance and customer success on Cadence emulation platforms.

Skills

PCIE/CXL/Ethernet/USB/AMBA

Verification Methodologies

C/C++/Linux Driver Dev

SOC design/verification

Hardware emulation

HDL (SystemVerilog/VHDL)

Scripting (shell/python/perl)

Compiler tools (make/gcc)

Education

Bachelors in CS or EE

Masters in CS or EE

Job description

Cadence Design Systems, Inc. in San Jose, CA is seeking a Principal Product Engineer to advance our Virtual Protocols and emulation-based verification platforms, partnering with R&D and field teams to ensure customer success.

You will own feature definition, deliver training, and help customers deploy Cadence Palladium and Protium systems, driving shift-left verification and performance, while expanding your software, hardware, and protocol knowledge.