Senior Principal Software Engineer - Physical Verification

Cadence Design Systems; San Jose (CA); On-site; USD 161,000 - 299,000; Full time

Benefits offered by this job

Paid vacation & holidays

401(k) plan with employer match

Employee stock purchase plan

Medical, dental and vision plans

Job summary

Cadence Design Systems seeks a Software Engineer for its Research & Development group, focusing on advanced software for physical verification at leading-edge semiconductor nodes. The role drives innovation in development and validation of software used to design and manufacture next-generation chips.

The position emphasizes designing robust software, validating and documenting solutions, and solving complex mathematical and geometric challenges within a geographically distributed team

Qualifications

• Master’s degree in Computer Science or Computer Engineering with 10+ years work experience.
• Strong proficiency in C and C++ programming languages.
• Solid problem-solving skills and the ability to tackle technical challenges.
• Effective written and verbal communication skills for collaboration across teams.

Responsibilities

• Design, develop, and implement robust software for physical verification of advanced semiconductor devices.
• Validate, maintain, and document software solutions to ensure reliability and accuracy.
• Solve complex mathematical and geometric challenges related to semiconductor verification.
• Collaborate with global team members to deliver high-quality results in a distributed environment.
• Contribute to technical discussions, code reviews, and process improvements.

Skills

C/C++

Problem solving

Communication

Education

Master’s degree in Computer Science or Computer Engineering

Job description

Cadence Design Systems seeks a Software Engineer for its Research & Development group, focusing on advanced software for physical verification at leading-edge semiconductor nodes. The role drives innovation in development and validation of software used to design and manufacture next-generation chips.

The position emphasizes designing robust software, validating and documenting solutions, and solving complex mathematical and geometric challenges within a geographically distributed team