Senior Verification & Product Strategy Engineer

CareerArc; San Jose (CA); On-site; USD 150,000 - 200,000; Full time

Job summary

AMD is seeking a Senior Engineer for Vivado Design Tools, located in San Jose, CA (preferred) or Longmont, CO. You will own verification methodology and simulation technologies, focusing on UVM and HDL simulation to drive FPGA/SoC design validation and deployment.

The role bridges R&D, product planning, and technical marketing, shaping the roadmap, and representing AMD at industry forums with customers and partners.

Qualifications

• Deep expertise in UVM, SystemVerilog, and modern verification methodologies.
• Experience with RTL simulation, HDL languages, and multi-language environments.
• Familiarity with IP protection, encryption, and licensing considerations.

Responsibilities

• Define product roadmap for simulation, encryption, and deployment.
• Translate verification challenges into methodologies and enablement content.
• Engage with customers and strategic partners to shape product direction and trust.

Skills

UVM

SystemVerilog

RTL verification

HDL simulation

AI copilots usage

Education

Bachelor’s/Master’s/PhD in CS/CE/EE

Tools

Vivado Simulator

Xcelium

Questa

Riviera

Job description

AMD is seeking a Senior Engineer for Vivado Design Tools, located in San Jose, CA (preferred) or Longmont, CO. You will own verification methodology and simulation technologies, focusing on UVM and HDL simulation to drive FPGA/SoC design validation and deployment.

The role bridges R&D, product planning, and technical marketing, shaping the roadmap, and representing AMD at industry forums with customers and partners.