Senior Verification Engineer - Remote/SoC AI-Driven Testing

System One; El Segundo (CA); Remote; USD 179.000 - 183.000; Teilzeit

Zusammenfassung

System One, Inc. is seeking a Senior Verification Engineer for 6-month contract work, with extension potential. Location options include on-site remote work, willing to relocate to Southern California (El Segundo) or Austin, TX. Compensation is $130–$133 per hour.

The role involves leading verification planning and execution for complex ASIC/SoC blocks, selecting methods, and building environments, coverage, and CI. Requires 5+ years of ASIC/SoC verification and SystemVerilog/UVM expertise.

Qualifikationen

• Bachelor's degree in Electrical/Computer Engineering or 7+ years related experience.
• 5+ years ASIC/SoC verification experience.
• Proficient in SystemVerilog/UVM or formal testbenches.
• Experience with coverage-driven verification and RTL debugging.

Aufgaben

• Own verification planning and execution from test plan to sign-off.
• Translate specs into verification strategies with coverage goals.
• Select methods: constrained-random, formal, and directed testing.
• Develop environments, reference models, scoreboards, monitors.
• Drive coverage closure, regression health, sign-off readiness.
• Build verification infrastructure and CI to reuse across levels.
• Apply AI-assisted verification for stimulus, triage, coverage.
• Review testbench architecture and mentor juniors.

Kenntnisse

Metric-driven verification

Assertions

Debugging complex RTL

Mentoring

Verification planning

Ausbildung

Bachelors in EE/CE

Tools

SystemVerilog

UVM

Formal verification

Jobbeschreibung

System One, Inc. is seeking a Senior Verification Engineer for 6-month contract work, with extension potential. Location options include on-site remote work, willing to relocate to Southern California (El Segundo) or Austin, TX. Compensation is $130–$133 per hour.

The role involves leading verification planning and execution for complex ASIC/SoC blocks, selecting methods, and building environments, coverage, and CI. Requires 5+ years of ASIC/SoC verification and SystemVerilog/UVM expertise.