Senior Verification Engineer - Remote & SoC AI-Driven

Protingent; Hutto (TX); Remote; USD 239,000 - 281,000; Full time

Benefits offered by this job

Insurance plan options (HDHP/POS)

Education/certification reimbursement

Pre-tax commuter benefits

Paid Time Off (PTO)

401k plan

Job summary

Protingent seeks a Senior Verification Engineer to own verification planning and execution for complex blocks and subsystems. You will translate designs into strategies, set coverage goals, and identify high-risk scenarios early.

The role includes selecting methods, building environments, and driving coverage closure through CI-enabled pipelines. You will mentor engineers, review testbench architectures, and advance AI-assisted verification for stimulus generation and regression triage.

Qualifications

• 7+ years of ASIC/SoC verification experience.
• Proficiency in SystemVerilog, UVM or formal testbenches.
• Experience with RTL and system-level debugging.
• Ability to develop AI-assisted verification for stimulus generation and coverage analysis.

Responsibilities

• Own verification planning and execution for complex blocks and subsystems, from test plan through sign-off.
• Translate design specifications into verification strategies, measurable coverage goals, and early identification of high-risk scenarios.
• Select verification methods for each problem, including constrained-random simulation, formal analysis, and directed testing.
• Develop verification environments, reference models, scoreboards, protocol monitors, coverage components, and assertions.
• Drive functional coverage closure, regression health, and sign-off readiness across simulation and formal results.
• Build verification infrastructure, regression and CI systems, and reuse strategy across IP, subsystem, and SoC levels.
• Apply and build AI-assisted verification capabilities for stimulus generation, regression triage, and coverage analytics.
• Review testbench architecture and debug methodology, and mentor junior engineers in verification methodology.

Skills

SystemVerilog

UVM

Formal verification

Metric-driven verification

RTL debugging

C-based stimulus

AI-assisted verification

Education

Bachelor's degree in Electrical/Computer Engineering

Job description

Protingent seeks a Senior Verification Engineer to own verification planning and execution for complex blocks and subsystems. You will translate designs into strategies, set coverage goals, and identify high-risk scenarios early.

The role includes selecting methods, building environments, and driving coverage closure through CI-enabled pipelines. You will mentor engineers, review testbench architectures, and advance AI-assisted verification for stimulus generation and regression triage.