Senior Verification Engineer

Protingent; Hutto (TX); Remoto; USD 239.000 - 281.000; Tempo pieno

Vantaggi offerti da questo lavoro

Insurance plan options (HDHP/POS)

Education/certification reimbursement

Pre-tax commuter benefits

Paid Time Off (PTO)

401k plan

Descrizione del lavoro

Protingent seeks a Senior Verification Engineer to own verification planning and execution for complex blocks and subsystems. You will translate designs into strategies, set coverage goals, and identify high-risk scenarios early.

The role includes selecting methods, building environments, and driving coverage closure through CI-enabled pipelines. You will mentor engineers, review testbench architectures, and advance AI-assisted verification for stimulus generation and regression triage.

Competenze

• 7+ years of ASIC/SoC verification experience.
• Proficiency in SystemVerilog, UVM or formal testbenches.
• Experience with RTL and system-level debugging.
• Ability to develop AI-assisted verification for stimulus generation and coverage analysis.

Mansioni

• Own verification planning and execution for complex blocks and subsystems, from test plan through sign-off.
• Translate design specifications into verification strategies, measurable coverage goals, and early identification of high-risk scenarios.
• Select verification methods for each problem, including constrained-random simulation, formal analysis, and directed testing.
• Develop verification environments, reference models, scoreboards, protocol monitors, coverage components, and assertions.
• Drive functional coverage closure, regression health, and sign-off readiness across simulation and formal results.
• Build verification infrastructure, regression and CI systems, and reuse strategy across IP, subsystem, and SoC levels.
• Apply and build AI-assisted verification capabilities for stimulus generation, regression triage, and coverage analytics.
• Review testbench architecture and debug methodology, and mentor junior engineers in verification methodology.

Conoscenze

SystemVerilog

UVM

Formal verification

Metric-driven verification

RTL debugging

C-based stimulus

AI-assisted verification

Formazione

Bachelor's degree in Electrical/Computer Engineering

Descrizione del lavoro

Position Title: Senior Verification Engineer

Protingent has an exciting direct hire opportunity for an Verification Engineer with our client in Hutto, TX.

Job Responsibilities

• Own verification planning and execution for complex blocks and subsystems, from test plan through sign-off.
• Translate design specifications into verification strategies, measurable coverage goals, and early identification of high-risk scenarios.
• Select verification methods for each problem, including constrained-random simulation, formal analysis, and directed testing.
• Develop verification environments, reference models, scoreboards, protocol monitors, coverage components, and assertions.
• Drive functional coverage closure, regression health, and sign-off readiness across simulation and formal results.
• Build verification infrastructure, regression and CI systems, and reuse strategy across IP, subsystem, and SoC levels.
• Apply and build AI-assisted verification capabilities for stimulus generation, regression triage, and coverage analytics.
• Review testbench architecture and debug methodology, and mentor junior engineers in verification methodology.

Job Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or related field, or 7+ years equivalent experience.
• Minimum five years of professional experience in ASIC or SoC functional verification.
• Hands-on expertise in SystemVerilog, UVM or formal testbench development and maintenance.
• Experience with metric-driven verification for planning, assertions, and functional coverage closure.
• Experience verifying complex digital control and datapath logic, including RTL and system-level debug.

Preferred Qualifications

• Background in space-based communications, wireless communications, or modem, baseband, or DSP hardware.
• Experience verifying LDPC, FEC, framing, or beamforming logic using bit-accurate reference models and fixed-point analysis.
• Formal verification experience on production silicon, including connectivity, register maps, arbitration, CDC, or security properties.
• Experience with interconnect or NoC verification covering performance, bandwidth, QoS, and deadlock analysis.
• Experience verifying fault tolerance and reliability features such as ECC, redundancy schemes, or fault injection.
• Experience developing C-based or portable stimulus for SoC, CPU boot, and firmware-driven test scenarios.
• Experience applying AI, ML, or LLM tooling to stimulus generation, regression triage, or coverage analysis.

Job Details

Job Type: Contract

Location: Austin, TX, San Diego, CA or Fully remote allowed for strong candidates

Pay Rate Range: $115-$135/hr ITAR obligations are associated with this role, U.S. citizenship, U.S. legal permanent resident status, or protected person status under 8 U.S.C. § 1324b(a) (1), (3) is required.

Benefits Package

Protingent offers competitive salaries, insurance plan options (HDHP plan or POS plan), education/certification reimbursement, pre-tax commuter benefits, Paid Time Off (PTO) and an administered 401k plan.

About Protingent

Protingent is an Award-Winning provider of top-tier Engineering and IT talent, trusted by companies at the forefront of innovation — from Software and Aerospace to AI, Clean Tech, Medical Devices, and Connected Technologies. We’re passionate about making a positive impact by connecting exceptional talent with meaningful opportunities and helping our clients build the future.