Senior Verification Engineer — Auto/MCU IP Leader

NXP Semiconductors; Austin (TX); On-site; USD 120,000 - 180,000; Full time

Job summary

NXP Semiconductors in Austin, TX is seeking a Senior Verification Engineer to join the MME MCU/MPU Digital IP team. You will drive a zero-defect mindset, provide technical leadership, and mentor a small team of engineers.

You will define and execute verification plans, develop test benches, and apply UVM-based and formal verification methodologies to ensure robust RTL with strong coverage, debugging, and automation capabilities.

Qualifications

• BSEE with 5+ years of semiconductor industry experience, or
• MSEE with 3+ years of experience, or
• PhD with 1+ years of experience

Responsibilities

• Define and execute verification plans
• Develop and implement verification testbenches
• Develop testbench components such as drivers, monitors, and scoreboards, and leverage advanced UVM VIPs
• Develop directed and constrained-random stimulus
• Analyze RTL, functional coverage, and assertion coverage results
• Define and develop functional coverage models
• Develop and maintain SystemVerilog assertions (SVA)
• Apply formal verification methodologies
• Demonstrate strong debugging skills, including failure reproduction and root-cause analysis
• Exhibit strong analytical and problem-solving skills; familiarity with major simulation and debug tools is a plus

Skills

Verilog

SystemVerilog

UVM

Formal verification

Python scripting

Education

BSEE

MSEE

PhD

Tools

UNIX/Linux

Job description

NXP Semiconductors in Austin, TX is seeking a Senior Verification Engineer to join the MME MCU/MPU Digital IP team. You will drive a zero-defect mindset, provide technical leadership, and mentor a small team of engineers.

You will define and execute verification plans, develop test benches, and apply UVM-based and formal verification methodologies to ensure robust RTL with strong coverage, debugging, and automation capabilities.