Senior TPM: ML Accelerator Chip Lead

Amazon Inc.; Austin, Northern (TX, KY); Hybrid; USD 195,000 - 263,000; Full time

Job summary

Amazon Inc. in Austin, TX seeks a Principal Technical Program Manager for Annapurna Labs to own end-to-end program execution for a multi-die ML accelerator chip, from RTL freeze through tape-out and into production readiness.

You will connect diverse engineering workstreams into a single schedule, identify critical paths weekly, and drive cross-functional decisions across RTL, DV, physical design, packaging, power, infrastructure, and latency-sensitive IP deliveries.

Qualifications

• Bachelor's degree in Engineering, Computer Science, or a related technical field.
• 10+ years of hands-on work managing complex technology projects.
• 10+ years of working directly with engineering teams.
• Deep knowledge of the chip development lifecycle: RTL verification milestones, physical design convergence, DFT, and timing closure.
• Experience managing programs with external design partners and IP vendors.

Responsibilities

• Own the integrated schedule and critical path analysis across multiple die tape-outs, updating weekly.
• Drive the weekly chip status cadence with inputs from RTL/DV, physical design, packaging, power, infrastructure, and post-silicon teams.
• Track verification convergence from feature completion through RTL closure and regression metrics; drive responses to keep milestones on track.
• Manage external design partner interfaces and negotiate schedule trades with cost awareness.
• Drive infrastructure readiness and external IP delivery with cross-team coordination to prevent tape-out delays.

Skills

Program management

Cross-functional leadership

Schedule management

Technical communication

Dependency modelling

Education

Bachelor's degree in Engineering, CS or related

Job description

Amazon Inc. in Austin, TX seeks a Principal Technical Program Manager for Annapurna Labs to own end-to-end program execution for a multi-die ML accelerator chip, from RTL freeze through tape-out and into production readiness.

You will connect diverse engineering workstreams into a single schedule, identify critical paths weekly, and drive cross-functional decisions across RTL, DV, physical design, packaging, power, infrastructure, and latency-sensitive IP deliveries.