Lead TPM for Next-Gen ML Silicon & Tape-Out

Amazon; Cupertino (CA); On-site; USD 224,000 - 303,000; Full time

Benefits offered by this job

RSUs

Health insurance

401(k) matching

Paid time off & parental leave

Job summary

Annapurna Labs seeks a Principal Technical Program Manager to own end-to-end program execution for a next-generation ML accelerator chip. You will connect a sprawling set of engineering workstreams into a single schedule, identify the critical path, and drive cross-functional decisions to keep tape-out and production readiness on track.

The role spans RTL freeze through tape-out and into production readiness, coordinating RTL, physical design, packaging, power, infrastructure, and external

Qualifications

• Bachelor's degree in Engineering, Computer Science, or a related technical field.
• 10+ years of hands-on work managing complex technology projects experience.
• 10+ years of working directly with engineering teams.

Responsibilities

• Own the integrated schedule and critical path analysis across multiple die tape-outs through engineering samples and production ramp.
• Drive the weekly chip status cadence by synthesizing inputs from RTL/DV, physical design, packaging, power, infrastructure, and post-silicon teams.
• Track verification convergence as a leading indicator by monitoring feature completion through RTL closure, bug trends, and regression pass rates by block.
• Manage the external design partner interface, owning the netlist delivery calendar and negotiating schedule trades.
• Drive infrastructure readiness and external IP delivery by partnering with compute and EDA platform teams on capacity planning.

Skills

Program management

Cross-functional leadership

Schedule management

Technical communication

External partner management

Education

Bachelor's degree in Engineering/CS/related field

Job description

Annapurna Labs seeks a Principal Technical Program Manager to own end-to-end program execution for a next-generation ML accelerator chip. You will connect a sprawling set of engineering workstreams into a single schedule, identify the critical path, and drive cross-functional decisions to keep tape-out and production readiness on track.

The role spans RTL freeze through tape-out and into production readiness, coordinating RTL, physical design, packaging, power, infrastructure, and external