Senior Test Engineering Lead - DFT & Readiness

Celestica

Richardson (TX)

On-site

USD 140,000 - 190,000

Full time

7 days ago

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Job summary

Celestica in Richardson, TX is seeking a Senior Manager of HPS Test Engineering to own testing architecture, strategy, and execution for next-generation products. You will lead a team of test hardware and software engineers delivering ICT, FCT, SLT, and burn-in solutions, while aligning with Front-End, Back-End, and Director teams.

The ideal candidate has 8+ years in test development for high-density hardware, deep DFT and JTAG expertise, and proven leadership with strong analytical and Six

Qualifications

8+ years in test development and leadership for high-density hardware.
Expert knowledge of DFT, IEEE 1149.x Boundary Scan (JTAG), PCIe Gen5/6, and test instrumentation.
Strong data analytics and problem-solving with a metrics-driven approach.

Responsibilities

Lead and mentor a multi-disciplinary test hardware and software team.
Define test strategy, KPIs, and delivery plans for NPIs.
Collaborate with silicon architects to embed BIST and boundary scan techniques.
Oversee ICT, FCT, SLT, and burn-in test development and execution.
Optimize test coverage, yield, and throughput; reduce false positives.
Drive early design-for-testability reviews with cross-functional teams.

Skills

DFT

Boundary Scan (JTAG)

PCIe Gen5/6

Python

C/C++

LabVIEW

SPC / Data Analytics

Test Automation

Metrics-Driven Leadership

Education

Bachelor’s or Master’s degree in Electrical Engineering / Computer Engineering / Computer Science

Job description

The ideal candidate has 8+ years in test development for high-density hardware, deep DFT and JTAG expertise, and proven leadership with strong analytical and Six

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