Senior SystemC Performance Modeling Engineer

Infobahn Softworld Inc; United States; On-site; USD 85,000 - 110,000; Part time

Job summary

A technology solutions provider in the United States is seeking a Performance Modeling/Verification Engineer to develop and enhance SystemC/TLM2 models for hardware components. The ideal candidate will have over 5 years of experience with SystemC, strong C++ skills, and be familiar with performance modeling techniques. This contract role involves collaborating with cross-functional teams and optimizing models for performance. Applicants should have a relevant degree and be ready to participate in system-level testing and debugging.

Qualifications

• Minimum 5 years of experience in SystemC.
• Proficiency in C/C++ programming.
• Knowledge of memory controller architectures, including DDR and LPDDR.
• Experience with handling complex projects.

Responsibilities

• Develop and maintain SystemC/TLM2 models for various hardware components.
• Collaborate with teams to integrate models into system-level designs.
• Optimize model performance to meet design specifications.
• Develop and execute testbenches for model validation.

Skills

SystemC

C++ integration

Transaction-Level Modeling

Verification methodologies

Debugging

Education

B.E/M.E/M.Tech or B.S/M.S in EE/CSE

Tools

SystemVerilog/UVM

Perforce

Git

Job description

A technology solutions provider in the United States is seeking a Performance Modeling/Verification Engineer to develop and enhance SystemC/TLM2 models for hardware components. The ideal candidate will have over 5 years of experience with SystemC, strong C++ skills, and be familiar with performance modeling techniques. This contract role involves collaborating with cross-functional teams and optimizing models for performance. Applicants should have a relevant degree and be ready to participate in system-level testing and debugging.