Senior System RTL Designer & SerDes Architect

AMD; San Jose (CA); Hybrid; USD 150,000 - 230,000; Full time

Benefits offered by this job

AMD benefits at a glance

Job summary

AMD is seeking a senior-level System RTL designer with a strong background in IP architecture to join our team in San Jose. You will influence architecture directions, own integration strategies, and collaborate with world-class experts to deliver groundbreaking silicon solutions.

You will balance performance, power, and area while driving schedules and managing risk across CPU/GPU/SoC projects. Excellent communicators who mentor others thrive here. This role is not eligible for visa sponsorship.

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field
• Experience analyzing CPU/GPU/system-level performance bottlenecks and workloads
• Knowledge of power management, low power microarchitecture, and design methodologies
• Strong cross-functional collaboration and communication skills to influence diverse stakeholders

Responsibilities

• Define IP features and capabilities; own architecture and micro-architecture requirements
• Drive technical specifications for IP blocks and provide direction to execution teams
• Align and optimize hardware (silicon), firmware, and feature enablement for performance and power
• Collaborate cross-functionally to identify risks and resolve architecture-level issues
• Own architecture analysis and support feature-change requests from marketing/business teams
• Partner with design teams on area/floorplan refinement, timing targets, verification test plans, and pre-silicon debug/performance sign-off
• Support post-silicon teams for performance tuning, power optimization, and issue debug

Skills

IP architecture

System-level performance

Power management

Cross-functional collaboration

Education

Bachelor’s or Master’s degree in Electrical Engineering or Computer Engineering

Job description

AMD is seeking a senior-level System RTL designer with a strong background in IP architecture to join our team in San Jose. You will influence architecture directions, own integration strategies, and collaborate with world-class experts to deliver groundbreaking silicon solutions.

You will balance performance, power, and area while driving schedules and managing risk across CPU/GPU/SoC projects. Excellent communicators who mentor others thrive here. This role is not eligible for visa sponsorship.