Senior/Staff Analog Design Engineer: High-Performance PMIC

IntelliPro

Santa Clara (CA)

On-site

USD 150,000 - 300,000

Full time

14 days+
Application generator

Stand out for this role — generate a tailored resume and cover letter in about a minute.

Get past ATS filters

Job summary

IntelliPro in Santa Clara, CA is seeking an Analog Design Engineer (Sr./Staff/Sr. Staff/Principle) to design precision analog circuits and optimize power and performance. The role includes transistor-level design, PVT validation, and collaboration with global teams.

You will mentor junior designers and contribute across multiple product lines, including high-performance mixed-signal blocks. This is a full-time position with growth opportunities and stock options.

Qualifications

  • 3 to 8+ years of hands-on analog and mixed-signal IC design.
  • Solid experience designing foundational analog blocks such as amplifiers, comparators, voltage references, or data converters.
  • Working knowledge of bias current, bandwidth, speed, and noise tradeoffs in real designs.
  • Proficiency with Cadence Virtuoso simulation tools.

Responsibilities

  • Analog Circuit Design: Design precision analog circuits including comparators, error amplifiers, current sense amplifiers, voltage references, and data converters (ADCs/DACs).
  • Power & Performance Optimization: Apply advanced design techniques to meet Iq reduction goals or high-speed requirements.
  • Transistor-Level Execution: Perform hands-on design, simulation, and validation across PVT corners.
  • Cross-Platform Exposure: Gain experience across multiple product lines and contribute to various PMIC/multiphase opportunities.
  • Layout Collaboration: Guide matching, routing, and isolation with the physical design team.
  • Mentorship & Growth: Collaborate with Principal Architects, participate in design reviews, and progressively own designs.
  • Collaboration & Communication: Document design intent and communicate with global teams.

Skills

Analog circuit design
Power management
Transistor-level design
Verification
Team collaboration
Mentorship
Documentation

Tools

Cadence Virtuoso

Job description

IntelliPro in Santa Clara, CA is seeking an Analog Design Engineer (Sr./Staff/Sr. Staff/Principle) to design precision analog circuits and optimize power and performance. The role includes transistor-level design, PVT validation, and collaboration with global teams.

You will mentor junior designers and contribute across multiple product lines, including high-performance mixed-signal blocks. This is a full-time position with growth opportunities and stock options.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

PMIC Analog Design Engineer
PMIC Analog Design Engineer

IntelliPro • Santa Clara (CA)

On-site
USD 150,000 - 300,000
Senior Analog Power IC Design Lead — Hybrid
Senior Analog Power IC Design Lead — Hybrid

Qorvo, Inc. • San Jose (CA), Northern (KY)

Hybrid
USD 170,000 - 222,000
Competitive base salary
Total Rewards package
EEO employer
Senior PMIC Design Engineer for Power Management ICs
Senior PMIC Design Engineer for Power Management ICs

Qualcomm • Santa Clara (CA), Northern (KY)

Hybrid
USD 153,000 - 230,000
Senior PMIC Design Engineer – Power Management
Senior PMIC Design Engineer – Power Management

Qualcomm • Santa Clara (CA)

On-site
USD 127,000 - 190,000
Senior Power IC Architect — High-Efficiency PMICs
Senior Power IC Architect — High-Efficiency PMICs

Analog Devices, Inc. • Chandler (AZ)

On-site
USD 120,000 - 160,000
Senior Principal Analog Power Design Engineer - Hybrid
Senior Principal Analog Power Design Engineer - Hybrid

Qorvo, Inc. • Olympia (WA)

Hybrid
USD 193,000 - 251,000
Analog/Mixed-Signal IC Design Lead (PMIC)
Analog/Mixed-Signal IC Design Lead (PMIC)

Celera Semiconductor • San Francisco (CA)

On-site
USD 130,000 - 170,000
Senior PMIC Architect & Verification Engineer
Senior PMIC Architect & Verification Engineer

Socket.dev • Santa Clara (CA)

On-site
USD 153,000 - 230,000
Senior PMIC Design Engineer (Power Management)
Senior PMIC Design Engineer (Power Management)

Qualcomm • Santa Clara (CA)

On-site
USD 153,000 - 230,000
Senior Power IC Lead | High-Performance Chip Design
Senior Power IC Lead | High-Performance Chip Design

Analog Devices, Inc. • Milpitas (CA)

On-site
USD 181,000 - 262,000
Medical coverage
Vision and dental coverage
401k
+1