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Cadence in San Jose seeks an senior IC design and signoff leader to drive large-scale engagements and tool adoption across advanced nodes. You will guide teams, align R&D with real customer needs, and push innovative timing closure methodologies.
Ideal candidates have 15+ years in IC design/signoff, deep STA knowledge, and strong scripting skills. Expect executive collaboration, influential communication, and ongoing Cadence leadership representation.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
The annual salary range for Washington is $154,000 to $286,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location.
Our benefits programs include:
We’re doing work that matters. Help us solve what others can’t.
We welcome applications from candidates with disabilities and in equity seeking groups. If you have accessibility needs during the application and interview process, we encourage you to make your needs known.