Senior SRAM/ROM Memory Compiler Engineer

NXP Semiconductors NV; Austin (TX); On-site; USD 160,000 - 230,000; Full time

Benefits offered by this job

In-office 3 days/week

Job summary

NXP Semiconductors is seeking an experienced memory circuit design engineer for SRAM/ROM memory compiler designs based in Austin, TX. You will design CMOS memory cells and periphery to meet performance, power, and area targets, and work with cross-functional teams on compiler leaf cells and verification flows.

Responsibilities include running simulations, validating against benchmarks, collaborating with CAD/layout teams, aligning with frontend models, and leveraging GenAI/EDA tools to improve

Qualifications

• 8+ years of SRAM memory circuit design experience.
• Experience with CMOS foundry technologies at 5nm and beyond.
• Familiarity with automotive design rules is a plus.
• Strong scripting knowledge (Perl, Tcl, Python).
• Creative mindset with strong analytical and problem-solving skills.

Responsibilities

• Implement CMOS memory circuits to meet performance, power, and area targets, including periphery circuits for functional safety and scan.
• Generate, execute, and evaluate simulations and test benches; compare against performance targets/benchmarks.
• Collaborate with layout teams on compiler leaf cells to improve area and performance.
• Work with CAD teams on implementation of designs into characterization, verification, and regression flows.
• Align with modeling/verification teams to ensure consistency with frontend models.
• Collaborate across global memory teams to share methodologies and best practices.
• Leverage GenAI tools to improve design methodologies and efficiency.

Skills

Analytical skills

Problem solving

Scripting (Perl/Python/tcl)

Team collaboration

Education

Bachelor’s degree in Electrical/Computer Engineering

Master’s degree preferred

Tools

Cadence Virtuoso

Other EDA tools

Job description

NXP Semiconductors is seeking an experienced memory circuit design engineer for SRAM/ROM memory compiler designs based in Austin, TX. You will design CMOS memory cells and periphery to meet performance, power, and area targets, and work with cross-functional teams on compiler leaf cells and verification flows.

Responsibilities include running simulations, validating against benchmarks, collaborating with CAD/layout teams, aligning with frontend models, and leveraging GenAI/EDA tools to improve