Senior Design Verification Engineer

Insight Global; North Reading (MA); On-site; USD 140,000 - 190,000; Full time

Job summary

Insight Global is seeking a Senior ASIC Verification Engineer to support the development of next-generation semiconductor products in North Reading, MA. You will build high-level reference models and verification environments used to validate complex ASIC and SoC designs.

You will develop SystemC/C++ reference models and verification environments with SystemVerilog and UVM, collaborating with architects and RTL designers to define expected behavior, debugging complex issues, and driving

Qualifications

• Proficient in SystemC/C++ for ASIC/SoC verification.
• Strong knowledge of SystemVerilog and UVM-based environments.
• Experience debugging complex functional issues in verification.
• Ability to plan and drive verification activities across projects.

Responsibilities

• Develop SystemC/C++ reference models for ASIC/SoC verification.
• Build and enhance verification environments using SystemVerilog and UVM.
• Collaborate with architects and RTL designers to define expected behavior.
• Debug complex functional issues and support root-cause analysis.
• Drive verification planning and execution across global engineering teams.
• Contribute to technical leadership and best practices within verification.

Skills

SystemC/C++

SystemVerilog

UVM

Debugging

Verification planning

Technical leadership

Tools

UVM tools

Job description

We are seeking a Senior ASIC Verification Engineer to support the development of next-generation semiconductor products. This engineer will play a key role in building high-level reference models and verification environments used to validate complex ASIC and SoC designs.

What You'll Do

• Develop SystemC/C++ reference models for ASIC and SoC verification.
• Build and enhance verification environments using SystemVerilog and UVM.
• Collaborate with architects and RTL designers to define expected behavior.
• Debug complex functional issues and support root-cause analysis.
• Drive verification planning and execution across global engineering teams.
• Contribute to technical leadership and best practices within verification.

This role is ideal for an engineer who enjoys system-level problem solving, advanced verification methodologies, and working on cutting-edge semiconductor technologies.