Senior SoC Physical Design Engineer – Tapeout Ready

Micron Technology, Inc; Folsom (CA); On-site; USD 130,000 - 170,000; Full time

Job summary

Micron Technology, Inc in Folsom, California, is looking for a Senior SoC Physical Design Engineer to drive advanced HBM SoC logic designs from netlist to GDSII. The role involves hands-on responsibilities for SoC blocks integration, ensuring designs meet PPA targets and collaborating across teams.

The ideal candidate will have extensive experience in SoC physical design, proficiency in EDA tools, and strong automation skills. A Bachelor’s or Master’s in Electrical Engineering is preferred along with significant experience in the field.

Qualifications

• Strong experience in SoC physical design implementation from netlist to GDSII.
• Proficiency with industry EDA tools.
• Strong scripting/automation skills.

Responsibilities

• Own physical implementation for SoC blocks including floor planning and placement.
• Drive timing closure across multi-mode scenarios.
• Collaborate with design and integration teams.
• Perform physical signoff including DRC/LVS and timing signoff.

Skills

SoC physical design implementation

EDA tools (Cadence Innovus/Tempus, Synopsys ICC2/PrimeTime)

Scripting/automation (Python, TCL, Perl, Shell)

Education

Bachelor's or Master's degree in Electrical Engineering or related field

Tools

Cadence Innovus

Synopsys ICC2

Siemens Calibre

Job description

Micron Technology, Inc in Folsom, California, is looking for a Senior SoC Physical Design Engineer to drive advanced HBM SoC logic designs from netlist to GDSII. The role involves hands-on responsibilities for SoC blocks integration, ensuring designs meet PPA targets and collaborating across teams.

The ideal candidate will have extensive experience in SoC physical design, proficiency in EDA tools, and strong automation skills. A Bachelor’s or Master’s in Electrical Engineering is preferred along with significant experience in the field.