Senior SoC Layout & Full-Chip Integration Engineer (Hybrid)

Intel

Phoenix (AZ)

Hybrid

USD 122,000 - 232,000

Full time

7 days ago
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Benefits offered by this job

Hybrid work model
Stock bonuses
Health benefits
Retirement plan
Vacation

Job summary

Intel Foundry's Design Technology Platform (DTP) organization seeks an engineer to lead full-chip floorplanning, custom layout methodologies, and tapeout for advanced-node silicon development vehicles.

You will collaborate across design, process technology, manufacturing, yield engineering and EDA to implement scalable, manufacturable design solutions and automation, with a hybrid work model and opportunities across Hillsboro and other US sites.

Qualifications

  • Masters or PhD with relevant industry experience.
  • Experience in custom/analog/mixed-signal layout at advanced technology nodes.
  • Proficiency in LVS/DRC/DFM verification and layout debugging.

Responsibilities

  • Lead full-chip floorplanning, physical integration, and tapeout for advanced-node silicon vehicles.
  • Develop and enhance custom layout methodologies and flows.
  • Drive physical verification closure including DRC, LVS, DFM, and antenna checks.
  • Collaborate with PDK, Technology Development, and EDA teams to implement scalable design solutions.
  • Analyze advanced-node design rules and contribute to design enablement for new process technologies.
  • Create automation using Tcl, Python, or SKILL to improve productivity.

Skills

Custom/analog/mixed-signal design
FEOL layout rules
Physical verification debugging
Automation scripting (Tcl/Python/SKILL

Education

Masters in Electrical/Computer Engineering
PhD in Electrical/Computer Engineering

Tools

Calibre
ICV
Cadence Virtuoso

Job description

Intel Foundry's Design Technology Platform (DTP) organization seeks an engineer to lead full-chip floorplanning, custom layout methodologies, and tapeout for advanced-node silicon development vehicles.

You will collaborate across design, process technology, manufacturing, yield engineering and EDA to implement scalable, manufacturable design solutions and automation, with a hybrid work model and opportunities across Hillsboro and other US sites.

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