Power Architect for AI/CPU SoC Optimization

Ampere; California; On-site; USD 182,000 - 273,000; Full time

Benefits offered by this job

Premium medical insurance

401K retirement plan

Unlimited Flextime

Job summary

Ampere is a semiconductor design company pioneering energy-efficient high-performance computing. We are seeking a Principal Power Architect to drive power modeling, analysis, and optimization across CPU, AI accelerator, memory, I/O, and interconnect designs.

You’ll work across architecture, RTL, firmware, and silicon, turning workload data into actionable design decisions with a focus on power management techniques and pre-/post-silicon characterization.

Qualifications

• Experience in semiconductor power analysis, modeling, optimization, power management, workload characterization, or silicon validation.
• Strong CMOS power fundamentals and power-reduction techniques.
• Knowledge of CPU, AI accelerator, memory, I/O, interconnect, and processor workload behavior.
• Experience with RTL and gate-level power-analysis tools and methodologies; familiarity with Spyglass, Power Artist, Joules, PrimePower, or equivalent is useful.
• Experience with emulation, FPGA, silicon measurement, telemetry, or power/performance correlation is valuable.
• Experience with voltage-frequency characterization, AVS, silicon binning, SKU definition, or Power-management firmware is a plus.
• Strong programming and scripting skills in Python; Tcl, Perl, C/C++, shell, SQL, or data-analysis tools are helpful.
• Experience using AI for productivity in silicon design
• Strong analytical, communication, collaboration, and problem-solving skills.
• Bachelor's degree & 8 years of related experience; or master’s degree & 6 years; or PhD & 3 years

Responsibilities

• Define power targets, budgets, operating points, and optimization strategies for CPU, AI accelerator, and SoC blocks.
• Develop and maintain architectural, activity-based, RTL, gate-level, emulation, and silicon power models.
• Set up and run RTL- and gate-level power analysis, develop benchmarks and tests, and review results for opportunities at the architecture, RTL, synthesis, and implementation levels.
• Characterize CPU, memory, PCIe, networking, storage, AI training, and AI inference workloads to identify power and performance bottlenecks.
• Drive power/performance/area/thermal tradeoff studies and power convergence across design & implementation phases.
• Develop automation, data-processing flows, dashboards, and analysis scripts using Python, TCL, Perl, or similar languages.
• Use AI for productivity to accelerate workload characterization, power modeling, anomaly detection, regression analysis, test generation, documentation, and power-management decisions.
• Validate AI-generated results against engineering data and design requirements.
• Drive power-management techniques including clock gating, power gating, DVFS, adaptive voltage scaling, retention, low-power modes, and workload-aware power management
• Lead or support post-silicon power and voltage-frequency characterization across domains and blocks.
• Work with ATE, production, firmware, validation, and systems teams on power management settings, AVS, voltage-frequency specifications, silicon binning, and SKU definition.
• Correlate pre-silicon estimates with silicon measurements, investigate gaps, and improve models and methodologies.
• Communicate findings, drive closure, and build consensus across architecture and design, verification, physical design, firmware, performance, and product teams.

Job description

Ampere is a semiconductor design company pioneering energy-efficient high-performance computing. We are seeking a Principal Power Architect to drive power modeling, analysis, and optimization across CPU, AI accelerator, memory, I/O, and interconnect designs.

You’ll work across architecture, RTL, firmware, and silicon, turning workload data into actionable design decisions with a focus on power management techniques and pre-/post-silicon characterization.