Senior SoC/Chip Lead - Next-Gen ASIC Architect

Renesas Electronics; San Jose (CA); On-site; USD 230,000 - 300,000; Full time

Benefits offered by this job

Bonus opportunities

Job summary

Renesas Electronics is seeking a Senior Principal Engineer- SoC/Chip Lead to drive end-to-end SoC programs from architecture to silicon. You will lead cross-functional teams across digital design, verification, physical design, DFT, firmware, validation, packaging, and product engineering.

The role requires 20+ years in semiconductors with leadership experience and proven success on large-scale ASIC/SoC projects, ideally at 3nm or 5nm nodes.

Qualifications

• 20+ years of semiconductor industry experience with substantial leadership responsibility.
• Proven experience as a Chip Lead, SoC Lead, or equivalent for large-scale ASIC/SoC products.
• Demonstrated success leading advanced-node SoCs, preferably 3nm and/or 5nm.

Responsibilities

• Own end-to-end technical leadership and execution of complex SoC programs from architecture through silicon production.
• Drive SoC planning, integration strategy, execution schedules, risk management, and tape-out readiness.
• Lead cross-functional teams across digital design, verification, physical design, DFT, firmware, validation, packaging, and product engineering.
• Define chip-level architecture, integration requirements, performance targets, and power/area objectives.
• Drive technical decision-making and trade-offs across architecture, implementation, and product requirements.
• Oversee subsystem and IP integration, ensuring successful deployment of complex multi-domain SoCs.
• Partner with analog and SerDes teams to integrate high-speed interfaces and mixed-signal subsystems into the overall chip architecture.
• Lead design reviews, execution reviews, silicon readiness assessments, and post-silicon debug activities.
• Drive issue resolution across the development lifecycle and ensure successful first-pass silicon execution.
• Mentor senior engineers and provide technical leadership across multiple engineering organizations.

Skills

End-to-end technical leadership

RTL Design

Design Verification

Physical Design

DFT

Static Timing Analysis

Low-Power Design

Silicon Bring-up

Strong communication

Education

Bachelor's, Master's, or Ph.D. in Electrical/Computer Engineering

Tools

NoC architectures

High-speed SerDes interfaces

Analog/mixed-signal IPs

Job description

Renesas Electronics is seeking a Senior Principal Engineer- SoC/Chip Lead to drive end-to-end SoC programs from architecture to silicon. You will lead cross-functional teams across digital design, verification, physical design, DFT, firmware, validation, packaging, and product engineering.

The role requires 20+ years in semiconductors with leadership experience and proven success on large-scale ASIC/SoC projects, ideally at 3nm or 5nm nodes.