Senior SIPI Design Engineer - High-Speed SerDes & PDN

Microchip; San Jose (CA); Hybrid; USD 91,000 - 232,000; Full time

Benefits offered by this job

Competitive base pay

Restricted stock units

Quarterly bonus payments

Health benefits from day one

Retirement savings plans

Job summary

A leading technology firm is seeking a Senior Technical Staff - Design (Signal and Power Integrity) in San Jose, CA. The role involves developing methodologies for Signal and Power Integrity in high-speed FPGA products. Candidates should possess strong SIPI analysis skills and have extensive experience in PCB design. This position offers a comprehensive compensation package with stock options and health benefits, supporting career growth in a collaborative global team environment.

Qualifications

• Bachelor's degree in Electrical Engineering or related field required.
• 15+ years of relevant experience needed.
• 10+ years of practical SIPI experience required.

Responsibilities

• Develop and drive Signal and Power Integrity methodologies.
• Conduct SIPI simulations to optimize system performance.
• Mentor other engineers and provide technical guidance.

Skills

Signal integrity analysis

Power integrity analysis

High-speed PCB design

S-Parameter extraction

Jitter analysis

Education

Bachelor of Science in Electrical Engineering

Tools

Ansys HFSS

Keysight ADS

Mentor Graphics Hyperlynx

Job description

A leading technology firm is seeking a Senior Technical Staff - Design (Signal and Power Integrity) in San Jose, CA. The role involves developing methodologies for Signal and Power Integrity in high-speed FPGA products. Candidates should possess strong SIPI analysis skills and have extensive experience in PCB design. This position offers a comprehensive compensation package with stock options and health benefits, supporting career growth in a collaborative global team environment.