Senior Silicon Photonics Test Engineer – Automation & RF

COHERENT

Fremont (CA)

Hybrid

USD 146,000 - 202,000

Full time

14 days+
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Job summary

Coherent Corp. in Fremont, CA is seeking an experienced Silicon Photonics Engineer to lead die-level test and characterization strategies, from early device characterization through product qualification and manufacturing readiness.

You will design automated test platforms and data workflows using Python, apply RF/microwave and optical measurement techniques, and collaborate with process, packaging, and design teams to drive test efficiency and device performance.

Qualifications

  • Bachelor’s degree or higher in Electrical Engineering, Optical Engineering, Physics, or related field.
  • At least 5 years of hands-on lab experience in photonics, semiconductor, or optoelectronic device testing.
  • Experience with high-precision probe stations and RF probing of semiconductor devices; optical alignment to devices; RF/microwave measurement techniques.

Responsibilities

  • Lead die-level test strategy from characterization to manufacturing readiness.
  • Develop automated test platforms and data analysis software.
  • Improve test throughput and maintain measurement accuracy.
  • Collaborate with cross-functional teams to correlate measurements with system performance.
  • Drive DFT improvements and lead root-cause investigations.

Skills

RF/microwave test & measurement
Python (test automation)
Optical alignment
Photonic devices knowledge
Data analysis (MATLAB/JMP)

Education

Bachelor’s degree or higher in Electrical Engineering, Optical Engineering, Physics

Tools

Vector network analyzer (VNA)
MATLAB
JMP
Python

Job description

Coherent Corp. in Fremont, CA is seeking an experienced Silicon Photonics Engineer to lead die-level test and characterization strategies, from early device characterization through product qualification and manufacturing readiness.

You will design automated test platforms and data workflows using Python, apply RF/microwave and optical measurement techniques, and collaborate with process, packaging, and design teams to drive test efficiency and device performance.

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