Senior Silicon Architect: 3D IC & Dielet Design - Equity

NVIDIA Corporation

Austin (TX)

Vor Ort

USD 168.000 - 311.000

Vollzeit

vor 39 Stunden
Sei unter den ersten Bewerbenden

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Benefits dieser Stelle

Equity
Benefits

Zusammenfassung

NVIDIA is seeking a Senior Logic Design Engineer to lead silicon architecture for next-generation CPU processors within the CPU Cache Coherent Interconnects Design Team.

You will influence dielet partitioning, packaging, and die-to-die interface planning, with opportunities across 2D, 2.5D interposers and 3D bonding. Collaboration with architecture, logic, physical design, and packaging teams is essential to meet performance and power goals.

Qualifikationen

  • Master's degree in Electrical/Computer Engineering or Computer Science or equivalent experience.
  • 8+ years of experience in high-performance processor designs.
  • Deep understanding of digital design and CPU architecture.
  • Experience with ASIC floorplanning and die-level wire densities.
  • Knowledge of cache coherency and high-speed interconnects.

Aufgaben

  • Own the silicon architecture and construction plan for next-generation CPU processors.
  • Explore 2D multi-chip module, 2.5D interposer and 3D hybrid-bonded dielet constructions, including the placement of IO and compute across dielets.
  • Develop early floorplans, and plan die-to-die and off-chip IO (UCIe, DRAM and PCIe).
  • Work with architecture, logic design, physical design and packaging teams to achieve area, performance, power and thermal goals.

Kenntnisse

Digital design
CPU architecture
ASIC floorplanning
Cache coherency
Interconnects

Ausbildung

Master's degree in Electrical/Computer Engineering or Computer Science

Jobbeschreibung

NVIDIA is seeking a Senior Logic Design Engineer to lead silicon architecture for next-generation CPU processors within the CPU Cache Coherent Interconnects Design Team.

You will influence dielet partitioning, packaging, and die-to-die interface planning, with opportunities across 2D, 2.5D interposers and 3D bonding. Collaboration with architecture, logic, physical design, and packaging teams is essential to meet performance and power goals.

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