Senior SI/PI Architect for AI Compute Platforms

Entrada Ventures

Santa Clara (CA)

On-site

USD 210,000 - 290,000

Full time

14 days+
Application generator

Stand out for this role — generate a tailored resume and cover letter in about a minute.

Get past ATS filters

Job summary

d-Matrix is seeking a Senior Staff SI/PI Engineer to be the technical authority for electrical integrity of high-performance AI compute platforms. You will own end-to-end SI/PI modeling, simulation, and correlation from silicon die through package to system PCBA, leading the lab validation and translating results into actionable constraints for layout teams.

The role requires MS/PhD in EE with extensive SI/PI background, expertise with 112G SerDes, PAM4 signaling, and hands-on measurements using

Qualifications

  • MS/PhD in Electrical Engineering with focus on electromagnetics or signal integrity is required.
  • 12+ years in SI/PI design for high-performance networking, GPUs, or server platforms.
  • Proficiency with industry-standard SI/PI tools (HFSS, Sigrity, SIwave, etc.) and high-speed interface experience (112G SerDes, PAM4).

Responsibilities

  • Own end-to-end SI/PI strategy for next-gen AI accelerators (PCIe Gen6/7, CXL, LPDDR5).
  • Model, simulate, and correlate SI/PI from die to package to system PCBA.
  • Lead lab validation using VNA, TDR, and oscilloscopes to close design loop.

Skills

SI/PI design
High-speed signaling
PAM4 signaling
Mentorship
Lab correlation

Education

MS/PhD in Electrical Engineering or related field
Specialization in Electromagnetics or Signal Integrity

Tools

Ansys HFSS
Cadence Sigrity
Keysight ADS
Simbeor
Ansys SIwave
Cadence PowerSI
CST

Job description

d-Matrix is seeking a Senior Staff SI/PI Engineer to be the technical authority for electrical integrity of high-performance AI compute platforms. You will own end-to-end SI/PI modeling, simulation, and correlation from silicon die through package to system PCBA, leading the lab validation and translating results into actionable constraints for layout teams.

The role requires MS/PhD in EE with extensive SI/PI background, expertise with 112G SerDes, PAM4 signaling, and hands-on measurements using

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Principal Signal Integrity Engineer
Principal Signal Integrity Engineer

Entrada Ventures • Santa Clara (CA)

On-site
USD 210,000 - 290,000
Senior SI/PI Engineer for High-Speed AI Hardware
Senior SI/PI Engineer for High-Speed AI Hardware

Majestic Labs ai • Los Altos (CA)

On-site
USD 150,000 - 210,000
Senior SI/PI Engineer for High-Speed AI Hardware
Senior SI/PI Engineer for High-Speed AI Hardware

Socket.dev • Los Altos (CA)

On-site
USD 150,000 - 190,000
Senior SI/PI Engineer — High‑Speed AI Compute Systems
Senior SI/PI Engineer — High‑Speed AI Compute Systems

Cerebras • Sunnyvale (CA)

On-site
USD 220,000 - 250,000
Senior SI/PI Engineer for AI Accelerator Platforms
Senior SI/PI Engineer for AI Accelerator Platforms

DensityAI • Mountain View (CA)

On-site
USD 250,000 - 350,000
Equity grant
Medical / dental / vision benefits
401(k) plan
+1
Senior ASIC Package SI/PI Engineer for AI/HPC
Senior ASIC Package SI/PI Engineer for AI/HPC

Slope • San Francisco (CA)

On-site
USD 180,000 - 240,000
Senior SI/PI Engineer, AI Accelerator
Senior SI/PI Engineer, AI Accelerator

Etched • San Jose (CA)

Hybrid
USD 180,000 - 240,000
Medical/dental/vision coverage
Housing subsidy near office
Relocation support
+3
Senior SI/PI Engineer for AI Compute Servers
Senior SI/PI Engineer for AI Compute Servers

SYNNEX Corporation • Fremont (CA)

On-site
USD 140,000 - 190,000
Insurance
Flexible Spending Account (FSA)
Health Savings Account (HSA)
+7
Silicon Packaging Engineer
Silicon Packaging Engineer

Socket.dev • Sunnyvale (CA)

On-site
USD 178,000 - 250,000
Signal Integrity & Power Integrity Engineer
Signal Integrity & Power Integrity Engineer

Majestic Labs ai • Los Altos (CA)

On-site
USD 150,000 - 210,000