Senior Serdes System Design Engineer, 100G+

Broadcom Inc.

Austin (TX)

On-site

USD 144,000 - 230,000

Full time

14 days+

Get more replies from employers

Send a job-specific resume in minutes.

Benefits offered by this job

Discretionary bonus
Equity grants
401(k) matching
ESPP

Job summary

Broadcom Inc. is seeking a DSP/Systems Design Engineer for high-speed Serdes in the Physical Layer Products (PLP) Division, focusing on 100G+ systems. You will implement signal processing algorithms, verify with MATLAB/C++ models, and validate designs across modern silicon nodes.

The role involves channel modeling, lab testing, and collaboration with analog/digital teams. Experience with CDR PLLs and 100G/200G Serdes is highly valued.

Qualifications

  • BSEE or MSEE with substantial relevant experience required.
  • Expert knowledge in communication theory and DSP algorithms.
  • Lab-ready with hands-on skills and familiarity with high-speed Serdes.

Responsibilities

  • Develop channel models and run simulations to define Serdes architecture.
  • Define and document signal processing block requirements and lab test plans.
  • Develop bit-exact MATLAB and C/C++ system models for simulation and verification.
  • Perform system-level simulations of Serdes to evaluate architectural tradeoffs.
  • Collaborate with RTL designers for vector matching verification and firmware development.

Skills

Communication Theory
Digital Signal Processing
Analog circuit behavior
Transmission line theory
Lab skills
CDR PLLs
IEEE standards knowledge
RTL coding

Education

Bachelor of Science in Electrical Engineering
Master of Science in Electrical Engineering

Tools

MATLAB
C/C++

Job description

Broadcom Inc. is seeking a DSP/Systems Design Engineer for high-speed Serdes in the Physical Layer Products (PLP) Division, focusing on 100G+ systems. You will implement signal processing algorithms, verify with MATLAB/C++ models, and validate designs across modern silicon nodes.

The role involves channel modeling, lab testing, and collaboration with analog/digital teams. Experience with CDR PLLs and 100G/200G Serdes is highly valued.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Senior Serdes System Design Engineer/Architect
Senior Serdes System Design Engineer/Architect

Broadcom Inc. • Austin (TX)

On-site
USD 144,000 - 230,000
Discretionary bonus
Equity grants
401(k) matching
+1
SerDes Applications Engineer - High-Speed Ethernet & PCIe
SerDes Applications Engineer - High-Speed Ethernet & PCIe

Broadcom Inc. • San Jose (CA)

On-site
USD 121,000 - 195,000
Medical benefits
Equity opportunities
Bonus potential
High-Speed SI/PI Engineer – SerDes 400G Systems
High-Speed SI/PI Engineer – SerDes 400G Systems

Broadcom • Fort Collins (CO)

On-site
USD 120,000 - 170,000
Medical benefits
401(k) with company match
Equity grants
Senior SerDes Analog Designer — 100Gbps+ High-Speed Hybrid
Senior SerDes Analog Designer — 100Gbps+ High-Speed Hybrid

Mulya Technologies • Fort Collins (CO)

Hybrid
USD 120,000 - 150,000
Senior DSP Architect - High-Speed SerDes & Chiplet IP
Senior DSP Architect - High-Speed SerDes & Chiplet IP

Eliyan • San Francisco (CA)

On-site
USD 150,000 - 200,000
Excellent benefits
Senior SerDes Analog Design Architect for 100Gbps
Senior SerDes Analog Design Architect for 100Gbps

Omni Design Technologies, Inc. • Austin (TX)

On-site
USD 120,000 - 160,000
Signal & Power Integrity Engineer – SerDes Expert, Equity
Signal & Power Integrity Engineer – SerDes Expert, Equity

Broadcom Inc. • San Jose (CA)

On-site
USD 140,000 - 210,000
Medical, dental and vision plans
401(K) participation including company
Employee Stock Purchase Program (ESPP)
+3
Senior SerDes Systems Engineer - High-Speed Transceivers
Senior SerDes Systems Engineer - High-Speed Transceivers

Synopsys Inc • Boxborough (MA)

On-site
USD 140,000 - 210,000
Senior SerDes Analog Design
Senior SerDes Analog Design

Mulya Technologies • Austin (TX)

Hybrid
USD 120,000 - 150,000
Senior Digital Design Engineer: High-Speed SerDes & DSP RTL
Senior Digital Design Engineer: High-Speed SerDes & DSP RTL

Asteralabs • San Jose (CA)

On-site
USD 130,000 - 180,000