Senior Serdes Systems Architect — 100G+ DSP Expert

Broadcom; Austin (TX); On-site; USD 122,000 - 195,000; Full time

Benefits offered by this job

Annual bonus (discretionary)

Equity grants & annual equity awards

ESPP

401(k) with company match

Employee Assistance Program (EAP)

Paid holidays

Paid sick leave

Paid vacation

Medical, dental, vision plans

Job summary

Broadcom is seeking a DSP/Systems Design Engineer for high-speed Serdes in the PLP Division in Austin. You will contribute to design, verification, and implementation of advanced signal processing for 100G+ Serdes in silicon technology nodes, collaborating with analog/digital teams and validating in lab environments.

You will participate in IEEE/OIF standard activities, develop channel models, and create test plans, firmware, and system models for verification.

Qualifications

• B.S.E.E. + 8+ years or M.S.E.E. + 6 years minimum.
• Expert knowledge in Communication Theory.
• Expert knowledge in Digital Signal Processing algorithms.
• Working knowledge of Analog circuit behavior.
• Working knowledge of Transmission line theory and s-parameter.
• Expert in MATLAB, C/C++ programming.
• Hands-on lab experience.
• Experience with high-speed CDR PLLs is highly preferred.
• Experience with wireline equalization techniques is a plus.
• RTL coding is a plus.
• Knowledge of IEEE 802.3/OIF Serdes standards and PCIe Gen6/Gen7 is a plus.

Responsibilities

• Develop channel models and simulations to define Serdes architecture.
• Define and document signal processing block requirements and lab test plans.
• Develop bit-exact MATLAB and C/C++ system models for simulation and verification.
• Create system-level simulation suites to evaluate architectural tradeoffs.
• Collaborate with RTL team for vector matching verification.
• Develop, test and debug firmware for physical layer functionality.
• Lab testing and debugging of Serdes.
• Prepare documentation and customer support materials.
• Support marketing with customer meetings and collateral.

Skills

Communication Theory

Digital Signal Processing

Analog Circuit Behavior

Transmission Line Theory

MATLAB

C/C++ Programming

Lab Experience

CDR PLLs

Wireline Equalization

RTL Coding

Serdes Standards (IEEE/PCIe)

Education

B.S.E.E.

M.S.E.E.

Tools

MATLAB

C/C++

Job description

Broadcom is seeking a DSP/Systems Design Engineer for high-speed Serdes in the PLP Division in Austin. You will contribute to design, verification, and implementation of advanced signal processing for 100G+ Serdes in silicon technology nodes, collaborating with analog/digital teams and validating in lab environments.

You will participate in IEEE/OIF standard activities, develop channel models, and create test plans, firmware, and system models for verification.