Senior SerDes Software Engineer — 224G PAM4 & PCIe Bring‑Up

Eridu AI; Saratoga (CA); On-site; USD 195,000 - 265,000; Full time

Job summary

Eridu AI in Silicon Valley seeks a senior SerDes software engineer to lead development, bring-up, validation, and optimization of 224 Gb/s-per-lane interfaces. You will work on Ethernet SerDes, PCIe, and UCIe in advanced silicon with cross-functional teams.

This senior role requires deep knowledge of SerDes architecture, PHY init, link training, equalization, calibration, and system SI. Collaboration with analog, ASIC, firmware, and validation engineers is essential.

Qualifications

• Bachelor's or master's degree required.
• 10+ years SerDes firmware experience.
• Strong C/C++, Python for automation and data analysis.

Responsibilities

• Develop embedded software and firmware for configuring high‑speed SerDes.
• Lead bring-up and optimization of 224G PAM4 SerDes in networking products.
• Support PCIe SerDes, UCIe interfaces, and diagnostics.
• Create test software for PRBS, BER, eye diagrams, and margin analysis.
• Mentor engineers and define reusable SerDes software architectures.

Skills

SerDes firmware

C/C++ programming

Python automation

Embedded software

Signal integrity

Education

Bachelor’s or Master’s degree in Electrical Engineering or related field

Job description

Eridu AI in Silicon Valley seeks a senior SerDes software engineer to lead development, bring-up, validation, and optimization of 224 Gb/s-per-lane interfaces. You will work on Ethernet SerDes, PCIe, and UCIe in advanced silicon with cross-functional teams.

This senior role requires deep knowledge of SerDes architecture, PHY init, link training, equalization, calibration, and system SI. Collaboration with analog, ASIC, firmware, and validation engineers is essential.