Senior SerDes Circuit Design Engineer (AMS, High-Speed)

Apple, Inc.; Beaverton (OR); On-site; USD 180,000 - 240,000; Full time

Job summary

Apple Inc. in Beaverton, Oregon seeks an experienced Analog Mixed-Signal designer to join our SerDes team. You will develop high-performance AMS circuits for SerDes PHY, evaluate topologies, and deliver IP across SOC while upholding quality and efficiency expectations.

You will collaborate with architecture, SIPI, packaging, and board design teams, lead block-level specifications, and drive IP validation to meet performance, power, and area targets.

Qualifications

• BS in electrical engineering or related field.
• 10+ years of relevant industry experience in AMS and SerDes.
• Strong understanding of PPA, timing closure, and analog block design.

Responsibilities

• Lead block-level spec creation with cross-functional teams.
• Drive IP development for high-speed IO at 100+ Gbps NRZ/PAM.
• Collaborate with SOC, architecture, packaging, and DFT teams.
• Oversee lab tests, debugging, and data analysis.
• Mentor juniors and guide circuit component development (TX/RX/PLL).

Skills

Analog Mixed-Signal

High-Speed SerDes

CMOS FinFET design

Block-level design

Lab testing & debugging

Scripting (Python)

Education

Bachelor's degree in Electrical Engineering

Tools

SystemVerilog

Verilog-AMS

MATLAB

Primetime

Nanotime

Job description

Apple Inc. in Beaverton, Oregon seeks an experienced Analog Mixed-Signal designer to join our SerDes team. You will develop high-performance AMS circuits for SerDes PHY, evaluate topologies, and deliver IP across SOC while upholding quality and efficiency expectations.

You will collaborate with architecture, SIPI, packaging, and board design teams, lead block-level specifications, and drive IP validation to meet performance, power, and area targets.