Senior SerDes Bring-Up & Validation Lead

Asteralabs; San Jose (CA); On-site; USD 185,000 - 240,000; Full time

Job summary

Astera Labs is seeking a Principal SerDes Bring-up Validation Engineer to lead end-to-end post-silicon bring-up, validation, and characterization for high-speed SerDes PHYs. You will own test objectives, develop automation, and drive data‑driven decisions with AMS design and firmware teams.

You will build scalable test frameworks, perform complex measurements with high-speed instruments, and mentor across disciplines to ensure robust silicon and reliable performance targets.

Qualifications

• Bachelor's degree in Electrical/Computer Engineering or related field.
• 8–12 years of hands-on mixed-signal lab experience with industry instruments.
• Experience in post-silicon validation and bring-up of high-speed PHYs/retimers; know SI/PI issues.

Responsibilities

• Design, develop, and execute bring-up plans for post-silicon validation.
• Lead hands-on test execution, interop checks, and performance benchmarking.
• Build and maintain automated test frameworks and data pipelines.

Skills

Python

C/C++

Troubleshooting

Test automation

Communication

Education

Bachelor's degree in Electrical/Computer Engineering

Tools

Oscilloscopes

BERTs

VNAs

Protocol analyzers

TDRs

Sampling scopes

Job description

Astera Labs is seeking a Principal SerDes Bring-up Validation Engineer to lead end-to-end post-silicon bring-up, validation, and characterization for high-speed SerDes PHYs. You will own test objectives, develop automation, and drive data‑driven decisions with AMS design and firmware teams.

You will build scalable test frameworks, perform complex measurements with high-speed instruments, and mentor across disciplines to ensure robust silicon and reliable performance targets.