Lead High-Speed SERDES Validation Engineer

AMD; San Jose (CA); On-site; USD 150,000 - 210,000; Full time

Job summary

AMD is seeking a Senior High-Speed SERDES Validation Engineer in San Jose, CA to drive characterization of >100Gbps SERDES, develop loopback test solutions, and translate pre-silicon models into manufacturable, high‑quality silicon products.

You will collaborate with design, product, and test teams, performing data-driven analysis and advancing test methodologies to improve yield and system performance.

Qualifications

• Experience in high-speed SERDES characterization and silicon validation.
• Knowledge of PLL, CDR, and high-speed TX/RX architectures.
• Familiarity with electrical compliance standards (PCIe, IEEE 802.3, OIF-CEI).
• Experience with automated test development in production environments.
• Hands‑on lab experience with high‑speed measurement equipment.
• Programming or scripting skills (Python, Perl, TCL, or Verilog).
• Understanding of FPGA/SoC systems and ability to interpret schematics or layouts.

Responsibilities

• Develop and deploy high-speed (>100Gbps) loopback test solutions from wafer sort through production
• Define and execute silicon validation and characterization strategies for high-speed transceivers
• Build and enhance automated test and measurement methodologies to improve efficiency and coverage
• Perform detailed silicon characterization (PLL, CDR, TX/RX) including jitter, phase noise, and signal integrity analysis
• Analyze data, generate characterization reports, and correlate pre-silicon simulations with post-silicon results
• Collaborate cross‑functionally with design, product, and test teams to debug issues and improve yield, quality, and manufacturability
• Utilize advanced lab instrumentation (oscilloscopes, BERTs, spectrum analyzers) to validate system performance

Skills

SERDES

Characterization

PLL

CDR

TX/RX

Test automation

Python

Verilog

FPGA/SoC

Schematics/layouts

Education

BSEE or MSEE preferred

Job description

AMD is seeking a Senior High-Speed SERDES Validation Engineer in San Jose, CA to drive characterization of >100Gbps SERDES, develop loopback test solutions, and translate pre-silicon models into manufacturable, high‑quality silicon products.

You will collaborate with design, product, and test teams, performing data-driven analysis and advancing test methodologies to improve yield and system performance.