Senior RTL/SoC Design Engineer

Synopsys, Inc.; Sunnyvale (CA); On-site; USD 130,000 - 170,000; Full time

Job summary

Synopsys, Inc. is seeking a RTL design engineer to transform micro-architecture specs into synthesizable SystemVerilog and VHDL RTL.

You will work on block-level designs, timing closure, and collaborate with verification and physical design to bring RTL to silicon. You will contribute to SoC designs for automotive, aerospace, defense, and HPC customers, implementing AXI/APB/AHB, I2C, SPI interfaces, and writing automation scripts to streamline the workflow.

Qualifications

• Bachelor's or Master's degree in Electrical or Computer Engineering.
• 3–4 years of hands-on ASIC/FPGA RTL design, implementation, and debug.
• Strong proficiency in Verilog, SystemVerilog, or VHDL RTL coding.
• Experience across ASIC design flow from micro-architecture to RTL, synthesis, and timing closure.
• Familiar with AXI, APB, AHB, I2C, SPI; PCIe, DDR, Ethernet a plus; Python/C++ for scripting.

Responsibilities

• Write and review Verilog, SystemVerilog, or VHDL RTL for block designs based on specs.
• Run RTL quality checks using linting, CDC/RDC analysis, and synthesis.
• Collaborate with verification engineers to debug testbenches and close coverage gaps.
• Work with physical design to resolve timing issues and support timing closure.
• Implement standard interface protocols (AXI, APB, AHB, I2C, SPI) in SoC subsystems.
• Use Python, Tcl, or shell to automate design tasks and improve productivity.
• Participate in design reviews and communicate design decisions across teams.

Skills

Verilog

SystemVerilog

VHDL

Education

Bachelor's or Master's in Electrical/Computer Engineering

Tools

Synthesis tools

Lint tools

CDC/RDC analysis

Static timing analysis

Job description

Synopsys, Inc. is seeking a RTL design engineer to transform micro-architecture specs into synthesizable SystemVerilog and VHDL RTL.

You will work on block-level designs, timing closure, and collaborate with verification and physical design to bring RTL to silicon. You will contribute to SoC designs for automotive, aerospace, defense, and HPC customers, implementing AXI/APB/AHB, I2C, SPI interfaces, and writing automation scripts to streamline the workflow.