Senior RTL Lead: ARM CPU Subsystems & Synthesis

MediaTek; Austin (TX); On-site; USD 152,400 - 254,500; Full time

Benefits offered by this job

Comprehensive health insurance

401(k)

Paid time off (PTO)

Performance bonus

Job summary

MediaTek in Austin is seeking a Senior RTL Design Engineer to lead RTL development for complex IP and ARM CPU subsystems. The role involves defining micro-architecture, ensuring RTL quality, and collaborating with worldwide teams. The ideal candidate has 8+ years of experience in RTL design, strong skills in SystemVerilog and Verilog, and a significant background in ARM CPU architecture. The position offers a competitive salary and comprehensive benefits including health insurance and a 401(k).

Qualifications

• 8+ years of industry experience in RTL design of complex IP and/or CPU subsystems.
• Proven experience across front-end quality flows: Lint, CDC, LEC/equivalence.
• Strong understanding of high-performance ARM CPU architecture.

Responsibilities

• Define micro-architecture for complex IP blocks and ARM CPU subsystems.
• Develop high-quality RTL and perform synthesis for IP and CPU subsystems.
• Run RTL quality checks and ensure RTL is robust and signoff-ready.

Skills

RTL coding and integration (SystemVerilog/Verilog)

Strong debugging and scripting skills (e.g., Perl, Python, Tcl)

Collaboration with cross-functional teams

Understanding of ARM CPU architecture

Education

Bachelor’s or Master’s degree in Computer Engineering, Electrical/Electronic Engineering

Job description

MediaTek in Austin is seeking a Senior RTL Design Engineer to lead RTL development for complex IP and ARM CPU subsystems. The role involves defining micro-architecture, ensuring RTL quality, and collaborating with worldwide teams. The ideal candidate has 8+ years of experience in RTL design, strong skills in SystemVerilog and Verilog, and a significant background in ARM CPU architecture. The position offers a competitive salary and comprehensive benefits including health insurance and a 401(k).