Senior RTL Engineer in Sonoma

Energy Jobline ZR

Sonoma (CA)

On-site

USD 180,000 - 280,000

Full time

14 days+
Application generator

An application made for this job — a tailored resume and cover letter that speak straight to the posting.

Get past ATS filters

Job summary

Energy Jobline ZR is seeking a Senior RTL Design Engineer for accelerator startups in the San Francisco Bay Area. You will own your design work in a small, high‑caliber team, collaborating closely with physical design, verification and leadership to push AI accelerator technology.

You’ll lead end‑to‑end projects across the full chip lifecycle, work with industry leaders from top semiconductor companies, and develop into a leadership role with equity upside as the company grows.

Qualifications

  • Strong experience across ASIC and SoC design principles.
  • Broad understanding of the wider elements of chip design.
  • Hands-on in a fast-moving, high-ownership startup environment.
  • Experience with AI/LLM systems and memory/fabric interconnect is a plus, with familiarity of high-speed protocols.

Responsibilities

  • Own design work from concept to implementation in collaboration with senior team members.
  • Lead end-to-end projects and work across the full chip lifecycle with cross-functional teams.
  • Develop into a leadership role with potential equity upside as the company grows.
  • Contribute to democratising and innovating AI accelerator technology in a startup setting.

Skills

ASIC design
SoC design
High-speed protocols
Startup environment

Job description

Job Description

Senior RTL Design Engineer - Accelerator Startups - San Francisco Bay Area

I'm working closely with a number of stealth startups in the Bay Area currently looking for senior RTL design engineers to work on next-level AI accelerator technology. Holding lots of responsibility within a small but high-calibre team of industry leaders, you'll own your own design work alongside collaborating closely with physical design, verification and leadership teams.

What you need
  • Strong experience across ASIC and SoC design principles
  • A broad understanding of the wider elements of chip design.
  • Ready to get hands-on in a fast-moving and high-ownership startup environment
  • Prior work with AI/LLM systems and memory/fabric interconnect is a plus, alongside familiarity with high-speed protocols.
What you'll be doing
  • Work closely with industry leaders picked from the top semiconductor companies
  • Lead projects end-to-end and work cross-functionally across the full chip lifecycle
  • Develop into a role with leadership and equity upside as the company grows
  • Rather than just supporting already dominant systems, you'll be central in democratising and innovating the next of technology
Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Senior RTL Engineer
Senior RTL Engineer

Oho Group • San Francisco (CA)

On-site
USD 270,000 - 360,000
Senior RTL Engineer for AI Accelerators – Lead Design
Senior RTL Engineer for AI Accelerators – Lead Design

Oho Group • San Francisco (CA)

On-site
USD 270,000 - 360,000
Senior RTL Design Engineer for AI Accelerator Chips
Senior RTL Design Engineer for AI Accelerator Chips

Energy Jobline ZR • Sonoma (CA)

On-site
USD 180,000 - 280,000
Lead ASIC Design Engineer
Lead ASIC Design Engineer

Oho Group • San Jose (CA)

On-site
USD 180,000 - 260,000
Senior RTL Architect for AI Accelerator Hardware
Senior RTL Architect for AI Accelerator Hardware

River AI Inc. • Palo Alto (CA), Austin (TX)

On-site
USD 200,000 - 420,000
Health benefits
Dental benefits
Vision benefits
+2
Lead RTL Design Engineer
Lead RTL Design Engineer

Anysilicon • Sunnyvale (CA), Northern (KY)

On-site
USD 210,000 - 320,000
Staff RTL Engineer
Staff RTL Engineer

Oho Group • San Jose (CA)

On-site
USD 130,000 - 160,000
RTL Designer
RTL Designer

Acceler8 Talent • Mountain View (CA)

On-site
USD 180,000 - 260,000
SOC Micro-Architect and RTL Designer
SOC Micro-Architect and RTL Designer

Acceler8 Talent • Mountain View (CA)

Hybrid
USD 180,000 - 220,000
Founding RTL Design Engineer: AI-Driven Microarchitecture
Founding RTL Design Engineer: AI-Driven Microarchitecture

Kindredventures • Palo Alto (CA)

On-site
USD 120,000 - 160,000
Competitive salary
Meaningful equity stake
Fast-paced startup environment