Senior RTL Design Engineer - AI Accelerator, Equity Upside

Oho Group; San Francisco (CA); On-site; USD 180,000 - 240,000; Full time

Job summary

Oho Group in the San Francisco Bay Area is seeking a Senior RTL Design Engineer to lead and own design work within a high-caliber startup team. You will collaborate closely with physical design, verification, and leadership to drive next-generation accelerator technology.

The role emphasizes ownership, cross-functional collaboration, and the chance to grow into leadership and equity as the company scales. A fast-paced, entrepreneurial environment is required.

Qualifications

• Strong experience across ASIC and SoC design principles.
• Broad understanding of the wider elements of chip design.
• Hands-on in fast-moving startup environments.
• Experience with AI/LLM systems and memory/fabric interconnect is a plus.

Responsibilities

• Collaborate with industry leaders from top semiconductor companies.
• Lead projects end-to-end across the full chip lifecycle.
• Develop into a leadership role with equity upside as the company grows.
• Help democratise and innovate the next generation of accelerator technology.

Skills

ASIC/SoC design

Chip design principles

Startup environment

Job description

Oho Group in the San Francisco Bay Area is seeking a Senior RTL Design Engineer to lead and own design work within a high-caliber startup team. You will collaborate closely with physical design, verification, and leadership to drive next-generation accelerator technology.

The role emphasizes ownership, cross-functional collaboration, and the chance to grow into leadership and equity as the company scales. A fast-paced, entrepreneurial environment is required.