Senior RFIC & Mixed-Signal Design Engineer

Blue Origin; Seattle (WA); On-site; USD 213,331 - 298,663; Full time

Benefits offered by this job

Stock Options

Paid Time Off

Education Support Program

401(k) with company match

Job summary

Blue Origin is seeking an experienced RFIC Design Engineer to join the Silicon Systems team on the TeraWave project. You will design RFICs and mixed-signal ASICs, implement using Cadence Virtuoso and Spectre RF, and develop verification models across pre/post-silicon stages.

The role requires deep RF/Mixed-Signal expertise, a strong Linux background, and a track record of successful tape-outs. You will collaborate with systems, firmware, architecture, and product engineering units to drive

Qualifications

• Bachelor-level degree in Electrical Engineering, Computer Engineering, or related technical discipline.
• 10+ years of RFIC design and development experience or equivalent research in a PhD program.
• Experience with RF and/or Mixed Signal Block design.
• Experience with Linux development environment.
• Direct tape-out experience in RF or deep sub-micron Analog mixed-signal chip.

Responsibilities

• Design and develop RFICs and mixed-signal ASICs.
• Implement designs using Cadence Virtuoso, Spectre RF and similar tools.
• Develop analog models for verification methodologies for ASIC verification and requirements validation.
• Create and execute test plans for pre and post silicon processes.
• Collaborate with cross-functional teams including systems, firmware, architecture, and product engineering.
• Adopt AI-based methodology throughout the design cycle of the custom ICs, from design to manufacturing.

Skills

RFIC design

Mixed-signal design

Cross-functional collaboration

Linux development

Education

Bachelors in Electrical/Computer Engineering

Tools

Cadence Virtuoso

Spectre RF

Analog modeling

Job description

Blue Origin is seeking an experienced RFIC Design Engineer to join the Silicon Systems team on the TeraWave project. You will design RFICs and mixed-signal ASICs, implement using Cadence Virtuoso and Spectre RF, and develop verification models across pre/post-silicon stages.

The role requires deep RF/Mixed-Signal expertise, a strong Linux background, and a track record of successful tape-outs. You will collaborate with systems, firmware, architecture, and product engineering units to drive