Senior RFIC Layout Designer – Space-grade SatCom

K2 Space Corporation; Los Angeles (CA); On-site; USD 120,000 - 180,000; Full time

Job summary

K2 Space Corporation seeks a Senior RFIC Layout Designer to drive the physical implementation of RF and mixed-signal ICs for next-generation satellite systems. This hands-on role partners with RF/analog, digital, and CAD teams to deliver high-performance silicon.

The selected candidate will manage block placement, routing, power planning, and full-chip sign-off, ensuring robust matching, high-frequency parasitic control, and reliable tapeouts for space missions.

Qualifications

• 5+ years RF/analog/mixed-signal layout experience.
• Finite- FinFET process technologies (≤16nm) experience.
• Top-level SoC layout integration and tapeouts.
• Collaboration with distributed teams and external vendors.
• Deep RF/analog layout techniques and high-frequency parasitics.
• Power planning and full-chip physical architecture exposure.
• Proficiency with industry-standard layout tools.

Responsibilities

• Execute high-quality layout for RF, analog, and mixed-signal blocks in advanced FinFET nodes (e.g., LNA, RF amplifiers, mixers, PLL, LO generation, ADC/DAC, baseband filters, bandgap/bias/LDO)
• Contribute to top-level layout integration, including block placement, routing, power planning, and floorplanning.
• Contribute to layout strategies to meet performance, area, power, reliability, and manufacturability targets.
• Ensure robust implementation of matching and symmetry for sensitive RF/analog structures, and high-frequency routing and parasitic control.
• Ensure robust implementation of EM/IR, ESD, latch‑up, and reliability considerations
• Collaborate closely with RF/analog designers, digital implementation teams, package/PCB engineers, and CAD to ensure seamless integration.
• Participate in establishing review processes (layout reviews, signoff checks, and quality metrics) to ensure first‑pass silicon success.
• Drive full‑chip physical signoff, including DRC/LVS/ERC closure, EM/IR and reliability verification.
• Own tapeout readiness and interface with foundry and EDA partners as needed.

Skills

RF/Analog/Mixed-Signal layout

FinFET 16nm

SoC layout integration

Vendor collaboration

RF/layout techniques

Power planning

EDA tools proficiency

Tools

EDA tools

Job description

K2 Space Corporation seeks a Senior RFIC Layout Designer to drive the physical implementation of RF and mixed-signal ICs for next-generation satellite systems. This hands-on role partners with RF/analog, digital, and CAD teams to deliver high-performance silicon.

The selected candidate will manage block placement, routing, power planning, and full-chip sign-off, ensuring robust matching, high-frequency parasitic control, and reliable tapeouts for space missions.