Senior RFIC Engineer - mmWave Transceivers (Hybrid + Equity)

CyberCoders; San Diego (CA); Hybrid; USD 180,000 - 230,000; Full time

Benefits offered by this job

Medical,Dental,Vision benefits

Vacation/PTO

Stock Option Grants

Flexible Work Arrangements

401K w/ 3.5% match

Job summary

CyberCoders is seeking a Senior RFIC Design Engineer to join our Wireless team. The role is hybrid, with locations in Chatham, NJ or San Diego, CA, offering a base salary range and equity.

You will design RFIC transceivers for mmWave applications and lead from schematic to layout, collaborating with seasoned engineers. The ideal candidate has 5+ years in RFIC design, strong Cadence Virtuoso experience, and deep knowledge of CMOS/BiCMOS processes.

Qualifications

• Bachelor's degree in Electrical Engineering or related field.
• 5+ years of RFIC design experience.
• Experience with Cadence Virtuoso and related EDA tools.
• Familiar with CMOS/BiCMOS processes and RF transceiver design.

Responsibilities

• Design LNAs, PAs, mixers, PLLs and related RF blocks.
• Bring designs from schematic to layout and verification using EDA tools.
• Work on sub-micron CMOS and BiCMOS designs.
• Define bring-up and validation of products and calibration methods.
• Support production test and integration of RFICs into antenna modules.
• Collaborate with experienced RFIC Design Engineers.

Skills

RFIC Design

mmWave Transceivers

CMOS / BiCMOS

LNA / PA / PLL Design

Cadence Virtuoso

RF Transceiver Architecture

5G / 6G Wireless Systems

Silicon Validation & Bring-Up

Education

Bachelor's degree in Electrical Engineering, RF Engineering, or related field

Tools

Cadence Virtuoso

Keysight

ANSYS

Mentor Graphics

Job description

CyberCoders is seeking a Senior RFIC Design Engineer to join our Wireless team. The role is hybrid, with locations in Chatham, NJ or San Diego, CA, offering a base salary range and equity.

You will design RFIC transceivers for mmWave applications and lead from schematic to layout, collaborating with seasoned engineers. The ideal candidate has 5+ years in RFIC design, strong Cadence Virtuoso experience, and deep knowledge of CMOS/BiCMOS processes.