RFIC Design Engineer

MixMode; Mountain View (CA); On-site; USD 140,000 - 180,000; Full time

Job summary

MixMode in Mountain View, California is seeking a Senior Staff RFIC Design Engineer to join its core design team. In this senior technical role, you will design and validate mmWave front-end circuit blocks, from schematic to silicon, while collaborating with founding engineers.

The ideal candidate will have significant experience in electrical engineering related to RF/mmWave IC design, coupled with a strong understanding of advanced CMOS technology and design tools. You will also mentor junior staff and ensure high design standards.

Qualifications

• MS + 5 years or PhD + 2 years experience in RF/mmWave IC design.
• Expertise in PA, LNA, phase shifter, VGA, mixer design.
• Proficiency with Cadence EDA tools and EM simulation.

Responsibilities

• Design mmWave front-end circuit blocks in advanced CMOS or RFSOI.
• Perform schematic design and simulation using Cadence Virtuoso.
• Conduct full-custom IC layout, ensuring DRC/LVS-clean designs.

Skills

mmWave IC design

Cadence EDA suite

Circuit design excellence

RF transmission line theory

Education

MS in Electrical Engineering

PhD in Electrical Engineering

Tools

Cadence Virtuoso

Ansys HFSS

EMX

ADS Momentum

Job description

The Role

We’re looking for a Senior Staff RFIC Design Engineer to join the core design team. You’ll design, simulate, and validate mmWave front-end circuit blocks for our next-generation beamformer chips—including LNAs, PAs, phase shifters, VGAs, and complete transceiver signal chains.

This is a senior technical role with significant design ownership. You’ll work directly with the founding engineers, contribute to architecture decisions, and see your designs go from schematic to silicon to customer products.

Responsibilities

• Design mmWave front-end circuit blocks (PAs, LNAs, phase shifters, VGAs, mixers) in advanced CMOS or RFSOI (SiGe and III-V processes are a plus).
• Perform transistor-level schematic design, simulation, and optimization using Cadence Virtuoso (Spectre, ADE).
• Conduct full-custom IC layout or direct layout engineers, ensuring DRC/LVS-clean designs at mmWave frequencies.
• Perform post-layout extraction and EM simulation (Ansys HFSS, EMX, ADS Momentum) to validate performance through parasitics.
• Collaborate on chip-level architecture and system partitioning for multi-channel beamformer ICs.
• Support silicon bring-up, bench characterization, and debugging of fabricated chips.
• Contribute to tapeout preparation, design reviews, and documentation.
• Mentor junior RFIC designers and contribute to a culture of technical excellence.

Required Qualifications

• MS + 5 years industry experience or PhD + 2 years industry experience in Electrical Engineering with a focus on RF/mmWave IC design.
• Demonstrated expertise in at least two of: PA, LNA, phase shifter, VGA, mixer, or frequency multiplier design at mmWave frequencies.
• Expert proficiency with Cadence EDA suite (Virtuoso, ADE, and Layout) and EM simulation tools (Ansys HFSS, EMX, or ADS Momentum).
• Experience with at least one full tapeout cycle: schematic to layout to fabrication to bring-up to characterization.
• Strong understanding of mmWave transmission line theory, matching networks, and on-chip passive design.
• Track record of published work or shipped products demonstrating circuit design excellence.

Preferred Qualifications

• Experience with phased array or multi-channel beamformer IC design.
• Background in SATCOM, 5G NR FR2, or automotive radar mmWave applications.
• Experience in SOI nodes with high resistivity substrates.
• Familiar with system-level RF specs: EVM, P1dB, noise figure, IP3, EIRP, and G/T.
• Experience in a startup or small-team environment with high design ownership.
• Strong communication skills and ability to present design tradeoffs clearly.