Senior RFIC Design Engineer - 5G/WLAN Transceivers

Qualcomm; Santa Clara (CA); Sur place; USD 149 000 - 209 000; Plein temps

Résumé du poste

Qualcomm Atheros, Inc. in Santa Clara is seeking an RFIC Design Engineer to define, design and develop complex RFICs for wireless applications including 4G, 5G, WLAN, BT and GPS, using advanced CMOS nodes such as 14nm and 28nm.

You will analyze radio signal paths, perform transistor-level design and verify performance in hardware. The successful candidate will hold a Master’s degree in Electrical/Computer Engineering or related field, and contribute in design reviews and cross-functional

Qualifications

• Master’s degree in Electrical/Computer Engineering or related field is required.
• Experience with RFIC design, transceiver blocks and mixed-signal circuits is expected.
• Familiarity with 4G/5G, WLAN, BT and GPS standards and related simulations is highly desirable.

Responsabilités

• Plan, design and develop complex RFICs in SoC environments and discrete RFICs.
• Perform circuit topology analysis and transistor-level design of highly-integrated transceivers.
• Contribute to design reviews and project meetings across engineering teams.

Formation

Master's degree in Electrical Engineering, Computer Engineering, Computer Science or related degree field

Description du poste

Qualcomm Atheros, Inc. in Santa Clara is seeking an RFIC Design Engineer to define, design and develop complex RFICs for wireless applications including 4G, 5G, WLAN, BT and GPS, using advanced CMOS nodes such as 14nm and 28nm.

You will analyze radio signal paths, perform transistor-level design and verify performance in hardware. The successful candidate will hold a Master’s degree in Electrical/Computer Engineering or related field, and contribute in design reviews and cross-functional