Senior QPU Design Engineer

Entangled Future

College Park (MD)

On-site

USD 170,000 - 250,000

Full time

14 days+

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Job summary

IonQ in College Park, Maryland, is seeking a Senior QPU Design Engineer to join our Processor Design team. You will be responsible for integrating features required to operate quantum computers into complex chips and for advancing high-performance quantum processing units.

You will work closely with scientists and fabrication engineers to bring ion-trapping chip designs into production, shaping the hardware behind our world-leading quantum systems in a fast-moving, highly technical environment.

Responsibilities

  • Turn operational requirements into chip layout for production.
  • Expand feature range of chips to support new technologies.
  • Guiding chips through the design process, from requirements to layout and tape out.
  • Laying out complex multi-layer chips, including metal track routing and interfaces with photonics and CMOS.
  • Collaborating with scientists to discuss requirements and settle on specifications.
  • Coordinating with other teams to ensure feasibility and compatibility.
  • Taking charge of projects independently and owning delivery of the final tape out.

Job description

Senior QPU Design Engineer at IonQ, College Park, Maryland, United States. A senior-level full time position in the Compute - Engineering team, listed under hardware engineering.

The Role

We are looking for a Senior QPU Design Engineer to join our Processor Design team at Oxford Ionics, now part of IonQ. You will be responsible for integrating all the features required to operate our quantum computers into complex chips, contributing to the team's mission of advancing the design of high performance quantum processing units. You will work closely with scientists and fabrication engineers to bring new designs for ion trapping chips into production, and you will play an important part in shaping the hardware behind our work building the world's most advanced quantum systems.

Responsibilities

In this position you will turn operational requirements into chip layout, supporting the delivery of devices that enable new technologies. You will have the opportunity to expand the range of features our chips support, contributing directly to the goal of building utility scale quantum computers.

  • Guiding chips through the design process, from requirements to layout and tape out
  • Laying out complex multi layer chips, including metal track routing and interfaces with photonics and CMOS
  • Collaborating with scientists to discuss their requirements and settle on specifications
  • Coordinating with other teams to ensure feasibility and compatibility
  • Taking charge of projects independently and owning delivery of the final tape out
Requirements

You will need experience translating design requirements into features, alongside hands on experience in chip layout. We are looking for someone who can work across teams to discuss the many aspects of chip design, understand how different parts of a chip influence and constrain one another, take on layout work themselves, and contribute effectively within a fast moving and highly technical team. You will need to drive the design process, solve problems as they arise, and take responsibility for delivery.

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