Senior Quantum Hardware Design Engineer

IBM; Town of Yorktown (NY); On-site; USD 110,000 - 160,000; Full time

Job summary

IBM Research in Yorktown Heights, NY, seeks engineers for the quantum hardware design/simulation team. You will contribute to processor designs, testsite layouts, and tapeout workflows, collaborating across physics, hardware, and software domains to push quantum technology forward.

The role emphasizes hands‑on design flow ownership, methodology development, and strong communication. Prior experience with quantum device design is a plus; familiarity with IC fabrication tools is welcome.

Qualifications

• Experience with hardware design tools for quantum hardware development.
• Ability to manage cross‑team interactions across physics, hardware and software engineering, fabrication, and test.
• Familiarity with IC fabrication tools and quantum device design is a bonus.

Responsibilities

• Participation in design releases for QPUs and related testsites.
• Connectivity/schematic capture for quantum hardware releases.
• Participation in layout construction and/or chip finishing for quantum hardware releases.
• EM simulation and model development for quantum hardware components and full designs.
• Methodology development, focusing on quantum hardware design.

Skills

Strong communication

Initiative

Cross-team collaboration

Ownership

Tools

Keysight PathWave ADS

Ansys Electronics Desktop/HFSS

Cadence Virtuoso/Spectre

Synopsys Custom Compiler/PrimeSim

Cadence Allegro

Linux-based systems

Job description

IBM Research is seeking talented engineers to join the quantum hardware design/simulation team at the IBM Thomas J. Watson Research Center in Yorktown Heights, NY. The team focuses on delivering quantum processor and processor‑adjacent designs to meet a variety of internal needs, and develops and drives the methodology to make these designs successful. Design scopes span from exploratory research to production‑roadmap quantum processor unit development. Working in Research means joining a team that accelerates discovery at the intersection of high‑performance computing, AI, quantum, and cloud. You'll collaborate with leading scientists, engineers, and visionaries to push boundaries and turn ideas into reality. With a culture built on curiosity, creativity, and collaboration, IBM Research offers the opportunity to grow your career while contributing to breakthroughs that transform industries and change the world.

Your role and responsibilities

The successful candidate will join IBM's quantum processor unit (QPU) design team, contributing directly both to processor designs (consisting of networks of interconnected/coupled qubits with the full infrastructure for control/readout) and testsite designs in support of innovation breakthroughs for QPU technologies. The role includes deep involvement at all levels of design tapeouts using both industry-standard and custom design tools, as well as methodology research and development for QPU and quantum hardware design.
The successful candidate will be expected to grow rapidly into ownership of key design flow steps, including methodology ownership, and be comfortable managing cross‑team interactions spanning physics, hardware and software engineering, fabrication, and test. Strong communication skills, initiative, and a track record of ownership are key requirements.
Applicants are expected to have experience with relevant hardware development tools such as Keysight PathWave ADS, Ansys Electronics Desktop/HFSS, Cadence Virtuoso/Spectre, Synopsys Custom Compiler/PrimeSim, Cadence Allegro etc.. They are also expected to have low‑level experience with Linux‑based software infrastructure and basic system administration concepts.
Candidates with direct, hands‑on experience participating in complex tapeouts or chip‑design‑adjacent activities (high‑performance packaging design/analysis, complex test/characterization, design methodology development etc.) are highly preferred. Familiarity with IC fabrication tools, quantum device design and/or quantum computing engineering is a bonus, but NOT required.

Responsibilities will include:

• Participation in design releases for QPUs and related testsites
• Connectivity/schematic capture for quantum hardware releases
• Participation in layout construction and/or chip finishing for quantum hardware releases
• EM simulation and model development for quantum hardware components and full designs
• Methodology development, focusing on quantum‑